On Thu, Nov 03, 2016 at 10:39:38AM +0000, Lionel Landwerlin wrote: > From: Ben Widawsky <benjamin.widaw...@intel.com> > > This patch will preserve the BO & offset, and not the miptree for the > aux_mcs buffer. Eventually it might make sense to pull put the sizing > function in miptree creation, but for now this should be sufficient > and not too hideous. > > v2: Save BO's offset too (Lionel) > > Signed-off-by: Ben Widawsky <benjamin.widaw...@intel.com> (v1) > Signed-off-by: Lionel Landwerlin <lionel.g.landwer...@intel.com> (v2) > --- > src/mesa/drivers/dri/i965/brw_blorp.c | 4 ++-- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 6 +++--- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 25 > ++++++++++++++++-------- > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 12 ++++++++++++ > 4 files changed, 34 insertions(+), 13 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c > b/src/mesa/drivers/dri/i965/brw_blorp.c > index d733b35..5adb4c6 100644 > --- a/src/mesa/drivers/dri/i965/brw_blorp.c > +++ b/src/mesa/drivers/dri/i965/brw_blorp.c > @@ -194,8 +194,8 @@ blorp_surf_for_miptree(struct brw_context *brw, > }; > > if (mt->mcs_buf) { > - surf->aux_addr.buffer = mt->mcs_buf->mt->bo; > - surf->aux_addr.offset = mt->mcs_buf->mt->offset; > + surf->aux_addr.buffer = mt->mcs_buf->bo; > + surf->aux_addr.offset = mt->mcs_buf->offset; > } else { > assert(surf->aux_usage == ISL_AUX_USAGE_HIZ); > struct intel_mipmap_tree *hiz_mt = mt->hiz_buf->mt; > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > index d6b799c..bff423e 100644 > --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > @@ -146,8 +146,8 @@ brw_emit_surface_state(struct brw_context *brw, > if (mt->mcs_buf && !(flags & INTEL_AUX_BUFFER_DISABLED)) { > intel_miptree_get_aux_isl_surf(brw, mt, &aux_surf_s, &aux_usage); > aux_surf = &aux_surf_s; > - assert(mt->mcs_buf->mt->offset == 0); > - aux_offset = mt->mcs_buf->mt->bo->offset64; > + assert(mt->mcs_buf->offset == 0); > + aux_offset = mt->mcs_buf->bo->offset64; > > /* We only really need a clear color if we also have an auxiliary > * surfacae. Without one, it does nothing. > @@ -181,7 +181,7 @@ brw_emit_surface_state(struct brw_context *brw, > assert((aux_offset & 0xfff) == 0); > drm_intel_bo_emit_reloc(brw->batch.bo, > *surf_offset + 4 * ss_info.aux_reloc_dw, > - mt->mcs_buf->mt->bo, > + mt->mcs_buf->bo, > dw[ss_info.aux_reloc_dw] & 0xfff, > read_domains, write_domains); > } > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > index 0001511..c2bff17 100644 > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c > @@ -1498,7 +1498,7 @@ intel_miptree_init_mcs(struct brw_context *brw, > */ > const int ret = brw_bo_map_gtt(brw, mt->mcs_buf->bo, "miptree"); > if (unlikely(ret)) { > - intel_miptree_release(&mt->mcs_buf->mt); > + drm_intel_bo_unreference(mt->mcs_buf->bo); > free(mt->mcs_buf); > return; > } > @@ -1518,6 +1518,7 @@ intel_mcs_miptree_buf_create(struct brw_context *brw, > uint32_t layout_flags) > { > struct intel_miptree_aux_buffer *buf = calloc(sizeof(*buf), 1); > + struct intel_mipmap_tree *temp_mt; > > if (!buf) > return NULL; > @@ -1527,7 +1528,7 @@ intel_mcs_miptree_buf_create(struct brw_context *brw, > * "The MCS surface must be stored as Tile Y." > */ > layout_flags |= MIPTREE_LAYOUT_TILING_Y; > - buf->mt = miptree_create(brw, > + temp_mt = miptree_create(brw, > mt->target, > format, > mt->first_level, > @@ -1537,14 +1538,22 @@ intel_mcs_miptree_buf_create(struct brw_context *brw, > mt->logical_depth0, > 0 /* num_samples */, > layout_flags); > - if (!buf->mt) { > + if (!temp_mt) { > free(buf); > return NULL; > } > > - buf->bo = buf->mt->bo; > - buf->pitch = buf->mt->pitch; > - buf->qpitch = buf->mt->qpitch; > + buf->bo = temp_mt->bo; > + buf->offset = temp_mt->offset; > + buf->pitch = temp_mt->pitch; > + buf->qpitch = temp_mt->qpitch; > + > + /* Just hang on to the BO which backs the AUX buffer; the rest of the > miptree > + * structure should go away. We use miptree create simply as a means to > make > + * sure all the constraints for the buffer are satisfied. > + */ > + drm_intel_bo_reference(temp_mt->bo); > + intel_miptree_release(&temp_mt); > > return buf; > } > @@ -3246,8 +3255,8 @@ intel_miptree_get_aux_isl_surf(struct brw_context *brw, > { > uint32_t aux_pitch, aux_qpitch; > if (mt->mcs_buf) { > - aux_pitch = mt->mcs_buf->mt->pitch; > - aux_qpitch = mt->mcs_buf->mt->qpitch; > + aux_pitch = mt->mcs_buf->pitch; > + aux_qpitch = mt->mcs_buf->qpitch; > > if (mt->num_samples > 1) { > assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS); > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h > b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h > index 5d6cf3b..0b49dc2 100644 > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h > @@ -339,6 +339,18 @@ struct intel_miptree_aux_buffer > drm_intel_bo *bo; > > /** > + * Offset into bo where the surface starts. > + * > + * @see intel_mipmap_aux_buffer::bo > + * > + * @see RENDER_SURFACE_STATE.AuxiliarySurfaceBaseAddress > + * @see 3DSTATE_DEPTH_BUFFER.SurfaceBaseAddress > + * @see 3DSTATE_HIER_DEPTH_BUFFER.SurfaceBaseAddress > + * @see 3DSTATE_STENCIL_BUFFER.SurfaceBaseAddress > + */ > + uint32_t offset; > + > + /** > * Pitch in bytes. > * > * @see RENDER_SURFACE_STATE.AuxiliarySurfacePitch
Shouldn't we also remove "intel_miptree_aux_buffer::mt" now? > -- > 2.10.2 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev