I'm a bit worried by this.
We've had some (a lot actually) unpleasant surprises in the past with
llvm choosing to use instruction sets not appropriate for a given cpu...
Hence only setting flags we checked ourselves being available, and
disabling everything else. Not sure if this actually still works though
given we set the host cpu name...
We do not want llvm to use evex encoded instructions (with any bit
width) for llvmpipe at this point on "ordinary" x86 cpus (I'm
specifically thinking about normal, albeit future, xeons, like
skylake-ep), as that would be a completely untested path (albeit, as I
said, I'm not even sure the current code actually really prevents
that...) - well I suppose you tested it with KNL, which is good to know.
Enabling it on KNL is fair enough I suppose, but I'm not sure if you can
detect such cpus easily based on feature, do they lack something which
the normal cpus have? I guess though since it's otherwise only mattering
for not yet released cpus we could still fix it up later if necessary...
Roland
Am 03.11.2016 um 22:29 schrieb Tim Rowley:
> ---
> src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
> b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
> index bd4d4d3..bff2198 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
> @@ -583,6 +583,8 @@
> lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
> MAttrs.push_back("-fma");
> }
> MAttrs.push_back(util_cpu_caps.has_avx2 ? "+avx2" : "-avx2");
> +
> +#if HAVE_LLVM <= 0x0308
> /* disable avx512 and all subvariants */
> #if HAVE_LLVM >= 0x0304
> MAttrs.push_back("-avx512cd");
> @@ -596,6 +598,7 @@
> lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
> MAttrs.push_back("-avx512vl");
> #endif
> #endif
> +#endif
>
> #if defined(PIPE_ARCH_PPC)
> MAttrs.push_back(util_cpu_caps.has_altivec ? "+altivec" : "-altivec");
>
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