This could have broken always_flush_cache on i965, since
reserved_space doesn't reflect the size of the workaround flushes, and
we might run out of space. This should make always_flush_cache more
useful on pre-i965, anyway (since the point is to flush around each
draw call, even within a batchbuffer).
---
src/mesa/drivers/dri/i915/intel_tris.c | 8 ++++++++
src/mesa/drivers/dri/intel/intel_batchbuffer.c | 4 ----
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c
b/src/mesa/drivers/dri/i915/intel_tris.c
index eb7fb60..23de6ea 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -234,6 +234,10 @@ void intel_flush_prim(struct intel_context *intel)
*/
intel->no_batch_wrap = true;
+ if (intel->always_flush_cache) {
+ intel_batchbuffer_emit_mi_flush(intel);
+ }
+
#if 0
printf("emitting %d..%d=%d vertices size %d\n", offset,
intel->prim.current_offset, count,
@@ -306,6 +310,10 @@ void intel_flush_prim(struct intel_context *intel)
ADVANCE_BATCH();
}
+ if (intel->always_flush_cache) {
+ intel_batchbuffer_emit_mi_flush(intel);
+ }
+
intel->no_batch_wrap = false;
drm_intel_bo_unreference(vb_bo);
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 036a324..38cdeda 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -169,10 +169,6 @@ _intel_batchbuffer_flush(struct intel_context *intel,
intel->batch.reserved_space = 0;
- if (intel->always_flush_cache) {
- intel_batchbuffer_emit_mi_flush(intel);
- }
-
/* Mark the end of the buffer. */
intel_batchbuffer_emit_dword(intel, MI_BATCH_BUFFER_END);
if (intel->batch.used & 1) {
--
1.7.7
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