On Wed, Oct 26, 2016 at 11:23 AM, Nanley Chery <nanleych...@gmail.com> wrote:
> 3DSTATE_WM_CHROMAKEY isn't programmed anywhere else.
> 3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a
> HZ op, so repeatedly clearing it after every blorp execution is
> redundant.
>
> Signed-off-by: Nanley Chery <nanley.g.ch...@intel.com>
> ---
> src/mesa/drivers/dri/i965/Makefile.sources | 1 -
> src/mesa/drivers/dri/i965/brw_state.h | 1 -
> src/mesa/drivers/dri/i965/brw_state_upload.c | 14 +++++++-
> src/mesa/drivers/dri/i965/gen8_disable.c | 53
> ----------------------------
> 4 files changed, 13 insertions(+), 56 deletions(-)
> delete mode 100644 src/mesa/drivers/dri/i965/gen8_disable.c
>
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index 4917358..30648e3 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -201,7 +201,6 @@ i965_FILES = \
> gen7_wm_surface_state.c \
> gen8_blend_state.c \
> gen8_depth_state.c \
> - gen8_disable.c \
> gen8_draw_upload.c \
> gen8_ds_state.c \
> gen8_gs_state.c \
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h
> b/src/mesa/drivers/dri/i965/brw_state.h
> index 75e497f..841c3de 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -149,7 +149,6 @@ extern const struct brw_tracked_state gen7_wm_state;
> extern const struct brw_tracked_state gen7_hw_binding_tables;
> extern const struct brw_tracked_state haswell_cut_index;
> extern const struct brw_tracked_state gen8_blend_state;
> -extern const struct brw_tracked_state gen8_disable_stages;
> extern const struct brw_tracked_state gen8_ds_state;
> extern const struct brw_tracked_state gen8_gs_state;
> extern const struct brw_tracked_state gen8_hs_state;
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
> b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index 2461ee5..b689ae4 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -332,7 +332,6 @@ static const struct brw_tracked_state
> *gen8_render_atoms[] =
> &brw_gs_samplers,
> &gen8_multisample_state,
>
> - &gen8_disable_stages,
> &gen8_vs_state,
> &gen8_hs_state,
> &gen7_te_state,
> @@ -411,6 +410,19 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
>
> if (brw->gen >= 8) {
> gen8_emit_3dstate_sample_pattern(brw);
> +
> + BEGIN_BATCH(5);
> + OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2));
> + OUT_BATCH(0);
> + OUT_BATCH(0);
> + OUT_BATCH(0);
> + OUT_BATCH(0);
> + ADVANCE_BATCH();
> +
> + BEGIN_BATCH(2);
> + OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2));
> + OUT_BATCH(0);
> + ADVANCE_BATCH();
> }
> }
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_disable.c
> b/src/mesa/drivers/dri/i965/gen8_disable.c
> deleted file mode 100644
> index b7598a3..0000000
> --- a/src/mesa/drivers/dri/i965/gen8_disable.c
> +++ /dev/null
> @@ -1,53 +0,0 @@
> -/*
> - * Copyright © 2011 Intel Corporation
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice (including the next
> - * paragraph) shall be included in all copies or substantial portions of the
> - * Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> DEALINGS
> - * IN THE SOFTWARE.
> - */
> -
> -#include "brw_context.h"
> -#include "brw_state.h"
> -#include "brw_defines.h"
> -#include "intel_batchbuffer.h"
> -
> -static void
> -disable_stages(struct brw_context *brw)
> -{
> - BEGIN_BATCH(5);
> - OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2));
> - OUT_BATCH(0);
> - OUT_BATCH(0);
> - OUT_BATCH(0);
> - OUT_BATCH(0);
> - ADVANCE_BATCH();
> -
> - BEGIN_BATCH(2);
> - OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2));
> - OUT_BATCH(0);
> - ADVANCE_BATCH();
> -}
> -
> -const struct brw_tracked_state gen8_disable_stages = {
> - .dirty = {
> - .mesa = 0,
> - .brw = BRW_NEW_BLORP |
> - BRW_NEW_CONTEXT,
> - },
> - .emit = disable_stages,
> -};
> --
> 2.10.1
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
LGTM.
Reviewed-by: Anuj Phogat <anuj.pho...@gmail.com>
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