In order to avoid impossible phi constraints, we insert moves in source
BBs to allow the RA to have the flexibility it needs. However there's
special logic in the RA to ignore NOPs. It's quite silly to then have
logic which carefully copies NOP values into registers. Leave the LValue
to be defined only by a NOP. (However it still needs a fresh
instruction as the LValue still gets a register assigned, we just
eliminate the instruction later.)
Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 77a28a2..e5f4305 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -470,9 +470,13 @@ RegAlloc::PhiMovesPass::visit(BasicBlock *bb)
for (phi = bb->getPhi(); phi && phi->op == OP_PHI; phi = phi->next) {
LValue *tmp = new_LValue(func, phi->getDef(0)->asLValue());
- mov = new_Instruction(func, OP_MOV, typeOfSize(tmp->reg.size));
-
- mov->setSrc(0, phi->getSrc(j));
+ Instruction *src = phi->getSrc(j)->getInsn();
+ if (src && src->op == OP_NOP) {
+ mov = new_Instruction(func, OP_NOP, typeOfSize(tmp->reg.size));
+ } else {
+ mov = new_Instruction(func, OP_MOV, typeOfSize(tmp->reg.size));
+ mov->setSrc(0, phi->getSrc(j));
+ }
mov->setDef(0, tmp);
phi->setSrc(j, tmp);
--
2.7.3
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