From: Marek Olšák <marek.ol...@amd.com>
This seems important considering how much we depend on some of the flags.
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 00f55c7..cbb3eec 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -361,20 +361,36 @@ scan_instruction(struct tgsi_shader_info *info,
if (fullinst->Instruction.Opcode >= TGSI_OPCODE_F2D &&
fullinst->Instruction.Opcode <= TGSI_OPCODE_DSSG)
info->uses_doubles = TRUE;
for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
scan_src_operand(info, fullinst, &fullinst->Src[i], i,
tgsi_util_get_inst_usage_mask(fullinst, i),
is_interp_instruction, &is_mem_inst);
}
+ if (fullinst->Instruction.Texture) {
+ for (i = 0; i < fullinst->Texture.NumOffsets; i++) {
+ struct tgsi_full_src_register src = {};
+
+ src.Register.File = fullinst->TexOffsets[i].File;
+ src.Register.Index = fullinst->TexOffsets[i].Index;
+ src.Register.SwizzleX = fullinst->TexOffsets[i].SwizzleX;
+ src.Register.SwizzleY = fullinst->TexOffsets[i].SwizzleY;
+ src.Register.SwizzleZ = fullinst->TexOffsets[i].SwizzleZ;
+
+ /* The usage mask is suboptimal but should be safe. */
+ scan_src_operand(info, fullinst, &src, 0, TGSI_WRITEMASK_XYZ,
+ false, &is_mem_inst);
+ }
+ }
+
/* check for indirect register writes */
for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
if (dst->Register.Indirect) {
info->indirect_files |= (1 << dst->Register.File);
info->indirect_files_written |= (1 << dst->Register.File);
}
if (dst->Register.Dimension && dst->Dimension.Indirect)
info->dim_indirect_files |= 1u << dst->Register.File;
--
2.7.4
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