On 10/19/2016 03:53 AM, Iago Toral wrote: > On Tue, 2016-10-18 at 17:16 -0700, Ian Romanick wrote: >> On 10/11/2016 02:01 AM, Iago Toral Quiroga wrote: >>> @@ -811,7 +811,7 @@ >>> vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) >>> if (const_offset) { >>> offset = brw_imm_ud(const_offset->u32[0] & ~15); >>> } else { >>> - offset = get_nir_src(instr->src[1], nir_type_int, 1); >>> + offset = get_nir_src(instr->src[1], nir_type_uint32, 1); >> Does it matter that this changed form int to uint32? > > At some point in the past we made brw_type_for_nir_type() only accept > bit-sized alu types, so this patch was necessary for things to work. > That's not the case now so this patch should not be necessary anymore > (a quick run of the fp64 tests shows no regressions without this > patch). I guess it does not hurt to add the bit-size information when > it is known though, but I think it is safe to drop this if you think it > is not worth it.
Uh... I was just wondering why the sized version is nir_type_uint32 instead of nir_type_int32 as I would have expected. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev