For the series: Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek On Sat, Aug 27, 2016 at 6:05 PM, Rhys Kidd <rhysk...@gmail.com> wrote: > Small code clean up that removes magic numbers where a TGSI > opcode has been defined. > > No functional change expected as each opcode is unsupported on > the respective hardware. > > Signed-off-by: Rhys Kidd <rhysk...@gmail.com> > --- > src/gallium/drivers/r600/r600_shader.c | 14 +++++++------- > src/gallium/include/pipe/p_shader_tokens.h | 1 + > 2 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/src/gallium/drivers/r600/r600_shader.c > b/src/gallium/drivers/r600/r600_shader.c > index a39301f..f7b8495 100644 > --- a/src/gallium/drivers/r600/r600_shader.c > +++ b/src/gallium/drivers/r600/r600_shader.c > @@ -8998,20 +8998,20 @@ static const struct r600_shader_tgsi_instruction > r600_shader_tgsi_instruction[] > [TGSI_OPCODE_ENDSUB] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_TXQ_LZ] = { FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, > [TGSI_OPCODE_TXQS] = { FETCH_OP_GET_NUMBER_OF_SAMPLES, tgsi_tex}, > - [105] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_RESQ] = { ALU_OP0_NOP, tgsi_unsupported}, > [106] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_NOP] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_FSEQ] = { ALU_OP2_SETE_DX10, tgsi_op2}, > [TGSI_OPCODE_FSGE] = { ALU_OP2_SETGE_DX10, tgsi_op2}, > [TGSI_OPCODE_FSLT] = { ALU_OP2_SETGT_DX10, tgsi_op2_swap}, > [TGSI_OPCODE_FSNE] = { ALU_OP2_SETNE_DX10, tgsi_op2_swap}, > - [112] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_MEMBAR] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_CALLNZ] = { ALU_OP0_NOP, tgsi_unsupported}, > [114] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_BREAKC] = { ALU_OP0_NOP, tgsi_loop_breakc}, > [TGSI_OPCODE_KILL_IF] = { ALU_OP2_KILLGT, tgsi_kill}, /* > conditional kill */ > [TGSI_OPCODE_END] = { ALU_OP0_NOP, tgsi_end}, /* aka HALT */ > - [118] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_DFMA] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_F2I] = { ALU_OP1_FLT_TO_INT, tgsi_op2_trans}, > [TGSI_OPCODE_IDIV] = { ALU_OP0_NOP, tgsi_idiv}, > [TGSI_OPCODE_IMAX] = { ALU_OP2_MAX_INT, tgsi_op2}, > @@ -9197,14 +9197,14 @@ static const struct r600_shader_tgsi_instruction > eg_shader_tgsi_instruction[] = > [TGSI_OPCODE_ENDSUB] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_TXQ_LZ] = { FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, > [TGSI_OPCODE_TXQS] = { FETCH_OP_GET_NUMBER_OF_SAMPLES, tgsi_tex}, > - [105] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_RESQ] = { ALU_OP0_NOP, tgsi_unsupported}, > [106] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_NOP] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_FSEQ] = { ALU_OP2_SETE_DX10, tgsi_op2}, > [TGSI_OPCODE_FSGE] = { ALU_OP2_SETGE_DX10, tgsi_op2}, > [TGSI_OPCODE_FSLT] = { ALU_OP2_SETGT_DX10, tgsi_op2_swap}, > [TGSI_OPCODE_FSNE] = { ALU_OP2_SETNE_DX10, tgsi_op2_swap}, > - [112] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_MEMBAR] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_CALLNZ] = { ALU_OP0_NOP, tgsi_unsupported}, > [114] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_BREAKC] = { ALU_OP0_NOP, tgsi_unsupported}, > @@ -9420,14 +9420,14 @@ static const struct r600_shader_tgsi_instruction > cm_shader_tgsi_instruction[] = > [TGSI_OPCODE_ENDSUB] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_TXQ_LZ] = { FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex}, > [TGSI_OPCODE_TXQS] = { FETCH_OP_GET_NUMBER_OF_SAMPLES, tgsi_tex}, > - [105] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_RESQ] = { ALU_OP0_NOP, tgsi_unsupported}, > [106] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_NOP] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_FSEQ] = { ALU_OP2_SETE_DX10, tgsi_op2}, > [TGSI_OPCODE_FSGE] = { ALU_OP2_SETGE_DX10, tgsi_op2}, > [TGSI_OPCODE_FSLT] = { ALU_OP2_SETGT_DX10, tgsi_op2_swap}, > [TGSI_OPCODE_FSNE] = { ALU_OP2_SETNE_DX10, tgsi_op2_swap}, > - [112] = { ALU_OP0_NOP, tgsi_unsupported}, > + [TGSI_OPCODE_MEMBAR] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_CALLNZ] = { ALU_OP0_NOP, tgsi_unsupported}, > [114] = { ALU_OP0_NOP, tgsi_unsupported}, > [TGSI_OPCODE_BREAKC] = { ALU_OP0_NOP, tgsi_unsupported}, > diff --git a/src/gallium/include/pipe/p_shader_tokens.h > b/src/gallium/include/pipe/p_shader_tokens.h > index 7621ab9..39ce9ea 100644 > --- a/src/gallium/include/pipe/p_shader_tokens.h > +++ b/src/gallium/include/pipe/p_shader_tokens.h > @@ -397,6 +397,7 @@ struct tgsi_property_data { > #define TGSI_OPCODE_BRK 73 > #define TGSI_OPCODE_IF 74 > #define TGSI_OPCODE_UIF 75 > + /* gap */ > #define TGSI_OPCODE_ELSE 77 > #define TGSI_OPCODE_ENDIF 78 > > -- > 2.7.4 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev