This commit does three different things in a single pass in order to
keep the amount of churn low: Remove the for_gather boolean argument
which was unused, pass the isl_view argument by value rather than by
reference since I'll have to modify it from within the function, and
add a target argument to allow callers to bind textures using a target
other than the original. The prototype of the function now looks
like:
void brw_emit_surface_state(struct brw_context *brw,
struct intel_mipmap_tree *mt,
GLenum target, struct isl_view view,
uint32_t mocs, uint32_t *surf_offset, int
surf_index,
unsigned read_domains, unsigned write_domains);
---
src/mesa/drivers/dri/i965/brw_state.h | 5 ++---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 +++++++++++-----------
src/mesa/drivers/dri/i965/gen8_blorp.c | 4 ++--
3 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 81f874d..e713e1d 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -276,9 +276,8 @@ int brw_get_texture_swizzle(const struct gl_context *ctx,
void brw_emit_surface_state(struct brw_context *brw,
struct intel_mipmap_tree *mt,
- const struct isl_view *view,
- uint32_t mocs, bool for_gather,
- uint32_t *surf_offset, int surf_index,
+ GLenum target, struct isl_view view,
+ uint32_t mocs, uint32_t *surf_offset, int
surf_index,
unsigned read_domains, unsigned write_domains);
void brw_emit_buffer_surface_state(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 9bee7dd..009660d 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -74,11 +74,11 @@ static const struct surface_state_info
surface_state_infos[] = {
void
brw_emit_surface_state(struct brw_context *brw,
struct intel_mipmap_tree *mt,
- const struct isl_view *view,
- uint32_t mocs, bool for_gather,
- uint32_t *surf_offset, int surf_index,
+ GLenum target, struct isl_view view,
+ uint32_t mocs, uint32_t *surf_offset, int surf_index,
unsigned read_domains, unsigned write_domains)
{
+ assert(mt->target == target);
const struct surface_state_info ss_info = surface_state_infos[brw->gen];
struct isl_surf surf;
@@ -90,7 +90,7 @@ brw_emit_surface_state(struct brw_context *brw,
uint64_t aux_offset = 0;
enum isl_aux_usage aux_usage = ISL_AUX_USAGE_NONE;
if (mt->mcs_mt &&
- ((view->usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) ||
+ ((view.usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) ||
mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED)) {
intel_miptree_get_aux_isl_surf(brw, mt, &aux_surf_s, &aux_usage);
aux_surf = &aux_surf_s;
@@ -107,7 +107,7 @@ brw_emit_surface_state(struct brw_context *brw,
ss_info.num_dwords * 4, ss_info.ss_align,
surf_index, surf_offset);
- isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view = view,
+ isl_surf_fill_state(&brw->isl_dev, dw, .surf = &surf, .view = &view,
.address = mt->bo->offset64 + mt->offset,
.aux_surf = aux_surf, .aux_usage = aux_usage,
.aux_address = aux_offset,
@@ -173,8 +173,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
};
uint32_t offset;
- brw_emit_surface_state(brw, mt, &view,
- surface_state_infos[brw->gen].rb_mocs, false,
+ brw_emit_surface_state(brw, mt, mt->target, view,
+ surface_state_infos[brw->gen].rb_mocs,
&offset, surf_index,
I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER);
@@ -478,8 +478,8 @@ brw_update_texture_surface(struct gl_context *ctx,
obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
view.usage |= ISL_SURF_USAGE_CUBE_BIT;
- brw_emit_surface_state(brw, mt, &view,
- surface_state_infos[brw->gen].tex_mocs,
for_gather,
+ brw_emit_surface_state(brw, mt, mt->target, view,
+ surface_state_infos[brw->gen].tex_mocs,
surf_offset, surf_index,
I915_GEM_DOMAIN_SAMPLER, 0);
}
@@ -1513,8 +1513,8 @@ update_image_surface(struct brw_context *brw,
const int surf_index = surf_offset - &brw->wm.base.surf_offset[0];
- brw_emit_surface_state(brw, mt, &view,
- surface_state_infos[brw->gen].tex_mocs,
false,
+ brw_emit_surface_state(brw, mt, mt->target, view,
+ surface_state_infos[brw->gen].tex_mocs,
surf_offset, surf_index,
I915_GEM_DOMAIN_SAMPLER,
access == GL_READ_ONLY ? 0 :
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c
b/src/mesa/drivers/dri/i965/gen8_blorp.c
index 870b67f..67e7ce2 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
@@ -547,9 +547,9 @@ gen8_blorp_emit_surface_states(struct brw_context *brw,
.usage = ISL_SURF_USAGE_TEXTURE_BIT,
};
- brw_emit_surface_state(brw, mt, &view,
+ brw_emit_surface_state(brw, mt, mt->target, view,
brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB,
- false, &wm_surf_offset_texture, -1,
+ &wm_surf_offset_texture, -1,
I915_GEM_DOMAIN_SAMPLER, 0);
}
--
2.9.0
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