---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 1f8fa80..c5b9715 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -327,7 +327,7 @@ src_reg
vec4_visitor::get_nir_src(const nir_src &src, unsigned num_components)
{
/* if type is not specified, default to signed int */
- return get_nir_src(src, nir_type_int, num_components);
+ return get_nir_src(src, nir_type_int32, num_components);
}
src_reg
@@ -733,7 +733,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
case nir_intrinsic_atomic_counter_dec: {
unsigned surf_index = prog_data->base.binding_table.abo_start +
(unsigned) instr->const_index[0];
- src_reg offset = get_nir_src(instr->src[0], nir_type_int,
+ src_reg offset = get_nir_src(instr->src[0], nir_type_int32,
instr->num_components);
const src_reg surface = brw_imm_ud(surf_index);
const vec4_builder bld =
@@ -787,7 +787,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
* from any live channel.
*/
surf_index = src_reg(this, glsl_type::uint_type);
- emit(ADD(dst_reg(surf_index), get_nir_src(instr->src[0], nir_type_int,
+ emit(ADD(dst_reg(surf_index), get_nir_src(instr->src[0],
nir_type_int32,
instr->num_components),
brw_imm_ud(prog_data->base.binding_table.ubo_start)));
surf_index = emit_uniformize(surf_index);
@@ -805,7 +805,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
if (const_offset) {
offset = brw_imm_ud(const_offset->u32[0] & ~15);
} else {
- offset = get_nir_src(instr->src[1], nir_type_int, 1);
+ offset = get_nir_src(instr->src[1], nir_type_uint32, 1);
}
src_reg packed_consts = src_reg(this, glsl_type::vec4_type);
--
2.7.4
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