On Mon, Jul 11, 2016 at 8:37 AM, Pohjolainen, Topi <
topi.pohjolai...@intel.com> wrote:
> On Sat, Jul 09, 2016 at 12:17:24PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/isl/isl.c | 2 +-
> > src/intel/isl/isl_gen6.c | 2 +-
> > src/intel/isl/isl_gen7.c | 2 +-
> > src/intel/isl/isl_storage_image.c | 4 ++--
> > src/intel/vulkan/anv_formats.c | 4 ++--
> > src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp | 4 ++--
> > 6 files changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> > index a3a9427..796b4cc 100644
> > --- a/src/intel/isl/isl.c
> > +++ b/src/intel/isl/isl.c
> > @@ -996,7 +996,7 @@ isl_apply_surface_padding(const struct isl_device
> *dev,
> > * padding requirements.
> > */
> > if (isl_format_is_yuv(info->format) &&
> > - (fmtl->bs == 96 || fmtl->bs == 48|| fmtl->bs == 24)) {
> > + (fmtl->bpb == 96 || fmtl->bpb == 48|| fmtl->bpb == 24)) {
>
> So these values were bits instead of bytes even though stored into 'bs'?
> Or how does this work? In the rest you have multiplied by the eight.
>
We used to use bpb and then we switched to bs and these values were left in
bpb. Now we're switching bak so I'm leaving them alone again. :-)
In other words, the old code had a bug that this is fixing. Since no one
uses ISL for YUV images yet, I didn't figure it was worth separating into
its own bugfix patch.
>
> > *total_h_el += 1;
> > *pad_bytes += 16;
> > }
> > diff --git a/src/intel/isl/isl_gen6.c b/src/intel/isl/isl_gen6.c
> > index 24c3939..699aa41 100644
> > --- a/src/intel/isl/isl_gen6.c
> > +++ b/src/intel/isl/isl_gen6.c
> > @@ -51,7 +51,7 @@ gen6_choose_msaa_layout(const struct isl_device *dev,
> > * - any compressed texture format (BC*)
> > * - any YCRCB* format
> > */
> > - if (fmtl->bs > 8)
> > + if (fmtl->bpb > 64)
> > return false;
> > if (isl_format_is_compressed(info->format))
> > return false;
> > diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
> > index 542c137..d9b0c08 100644
> > --- a/src/intel/isl/isl_gen7.c
> > +++ b/src/intel/isl/isl_gen7.c
> > @@ -51,7 +51,7 @@ gen7_choose_msaa_layout(const struct isl_device *dev,
> > * formats: any format with greater than 64 bits per element, any
> > * compressed texture format (BC*), and any YCRCB* format.
> > */
> > - if (fmtl->bs > 8)
> > + if (fmtl->bpb > 64)
> > return false;
> > if (isl_format_is_compressed(info->format))
> > return false;
> > diff --git a/src/intel/isl/isl_storage_image.c
> b/src/intel/isl/isl_storage_image.c
> > index 590d2e4..2617eb0e 100644
> > --- a/src/intel/isl/isl_storage_image.c
> > +++ b/src/intel/isl/isl_storage_image.c
> > @@ -194,9 +194,9 @@ isl_has_matching_typed_storage_image_format(const
> struct brw_device_info *devinf
> > if (devinfo->gen >= 9) {
> > return true;
> > } else if (devinfo->gen >= 8 || devinfo->is_haswell) {
> > - return isl_format_get_layout(fmt)->bs <= 8;
> > + return isl_format_get_layout(fmt)->bpb <= 64;
> > } else {
> > - return isl_format_get_layout(fmt)->bs <= 4;
> > + return isl_format_get_layout(fmt)->bpb <= 32;
> > }
> > }
> >
> > diff --git a/src/intel/vulkan/anv_formats.c
> b/src/intel/vulkan/anv_formats.c
> > index 457e820..b26e48a 100644
> > --- a/src/intel/vulkan/anv_formats.c
> > +++ b/src/intel/vulkan/anv_formats.c
> > @@ -271,7 +271,7 @@ anv_get_format(const struct brw_device_info
> *devinfo, VkFormat vk_format,
> > isl_format_get_layout(format.isl_format);
> >
> > if (tiling == VK_IMAGE_TILING_OPTIMAL &&
> > - !util_is_power_of_two(isl_layout->bs)) {
> > + !util_is_power_of_two(isl_layout->bpb)) {
> > /* Tiled formats *must* be power-of-two because we need up upload
> > * them with the render pipeline. For 3-channel formats, we fix
> > * this by switching them over to RGBX or RGBA formats under the
> > @@ -409,7 +409,7 @@ anv_physical_device_get_format_properties(struct
> anv_physical_device *physical_d
> > * what most clients will want.
> > */
> > if (linear_fmt.isl_format != ISL_FORMAT_UNSUPPORTED &&
> > -
> !util_is_power_of_two(isl_format_layouts[linear_fmt.isl_format].bs) &&
> > +
> !util_is_power_of_two(isl_format_layouts[linear_fmt.isl_format].bpb) &&
> > isl_format_rgb_to_rgbx(linear_fmt.isl_format) ==
> ISL_FORMAT_UNSUPPORTED) {
> > tiled &= ~VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT &
> > ~VK_FORMAT_FEATURE_BLIT_DST_BIT;
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
> > index fc1fc13..a4774e6 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
> > @@ -982,7 +982,7 @@ namespace brw {
> > /* Untyped surface reads return 32 bits of the surface per
> > * component, without any sort of unpacking or type
> conversion,
> > */
> > - const unsigned size = isl_format_get_layout(format)->bs / 4;
> > + const unsigned size = isl_format_get_layout(format)->bpb /
> 32;
> > /* they don't properly handle out of bounds access, so we
> have to
> > * check manually if the coordinates are valid and
> predicate the
> > * surface read on the result,
> > @@ -1130,7 +1130,7 @@ namespace brw {
> > /* Untyped surface writes store 32 bits of the surface
> per
> > * component, without any sort of packing or type
> conversion,
> > */
> > - const unsigned size = isl_format_get_layout(format)->bs
> / 4;
> > + const unsigned size = isl_format_get_layout(format)->bpb
> / 32;
> >
> > /* they don't properly handle out of bounds access, so
> we have
> > * to check manually if the coordinates are valid and
> predicate
> > --
> > 2.5.0.400.gff86faf
> >
> > _______________________________________________
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
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