On 06/28/2016 12:06 AM, Ilia Mirkin wrote:
On Mon, Jun 27, 2016 at 6:05 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote:
On Mon, Jun 27, 2016 at 6:04 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:
On 06/28/2016 12:02 AM, Ilia Mirkin wrote:
This loses you saturation. Does the target account for this?
No saturate flag for FADD32I.
That's not what I asked.
Specifically look at this code:
bool
TargetNVC0::isSatSupported(const Instruction *insn) const
{
if (insn->op == OP_CVT)
return true;
if (!(opInfo[insn->op].dstMods & NV50_IR_MOD_SAT))
return false;
if (insn->dType == TYPE_U32)
return (insn->op == OP_ADD) || (insn->op == OP_MAD);
// add f32 LIMM cannot saturate
if (insn->op == OP_ADD && insn->sType == TYPE_F32) {
if (insn->getSrc(1)->asImm() &&
insn->getSrc(1)->reg.data.u32 & 0xfff)
return false;
}
Note how it will say that sat is supported for SIMMs with FADD? So the
compiler will generate those ops, but then the emitter won't be able
to handle it.
Okay, I get it.
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