On May 26, 2016, at 3:06 PM, Tim Rowley
<timothy.o.row...@intel.com<mailto:timothy.o.row...@intel.com>> wrote:
v2: style code, add avx512 to cpu dump
---
src/gallium/auxiliary/util/u_cpu_detect.c | 26 ++++++++++++++++++++++++++
src/gallium/auxiliary/util/u_cpu_detect.h | 10 ++++++++++
2 files changed, 36 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c
b/src/gallium/auxiliary/util/u_cpu_detect.c
index aa3c30a..03f45cf 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -387,6 +387,23 @@ util_cpu_detect(void)
util_cpu_caps.has_avx2 = (regs7[1] >> 5) & 1;
}
+ // check for avx512
+ if (((regs2[2] >> 27) & 1) && // OSXSAVE
+ (xgetbv() & (0x7 << 5)) && // OPMASK: upper-256 enabled by OS
+ (xgetbv() & (0x3 << 1))) { // XMM/YMM enabled by OS
In the general feature flags above this, has_avx uses ((xgetbv() & 6) == 6) to
establish XMM/YMM support.
https://software.intel.com/en-us/articles/introduction-to-intel-advanced-vector-extensions
+ uint32_t regs3[4];
+ cpuid(0x00000007, regs3);
+ util_cpu_caps.has_avx512f = (regs3[1] >> 16) & 1;
+ util_cpu_caps.has_avx512dq = (regs3[1] >> 17) & 1;
+ util_cpu_caps.has_avx512ifma = (regs3[1] >> 21) & 1;
+ util_cpu_caps.has_avx512pf = (regs3[1] >> 26) & 1;
+ util_cpu_caps.has_avx512er = (regs3[1] >> 27) & 1;
+ util_cpu_caps.has_avx512cd = (regs3[1] >> 28) & 1;
+ util_cpu_caps.has_avx512bw = (regs3[1] >> 30) & 1;
+ util_cpu_caps.has_avx512vl = (regs3[1] >> 31) & 1;
+ util_cpu_caps.has_avx512vbmi = (regs3[2] >> 1) & 1;
+ }
+
if (regs[1] == 0x756e6547 && regs[2] == 0x6c65746e && regs[3] ==
0x49656e69) {
/* GenuineIntel */
util_cpu_caps.has_intel = 1;
@@ -454,6 +471,15 @@ util_cpu_detect(void)
debug_printf("util_cpu_caps.has_xop = %u\n", util_cpu_caps.has_xop);
debug_printf("util_cpu_caps.has_altivec = %u\n",
util_cpu_caps.has_altivec);
debug_printf("util_cpu_caps.has_daz = %u\n", util_cpu_caps.has_daz);
+ debug_printf("util_cpu_caps.has_avx512f = %u\n",
util_cpu_caps.has_avx512f);
+ debug_printf("util_cpu_caps.has_avx512dq = %u\n",
util_cpu_caps.has_avx512dq);
+ debug_printf("util_cpu_caps.has_avx512ifma = %u\n",
util_cpu_caps.has_avx512ifma);
+ debug_printf("util_cpu_caps.has_avx512pf = %u\n",
util_cpu_caps.has_avx512pf);
+ debug_printf("util_cpu_caps.has_avx512er = %u\n",
util_cpu_caps.has_avx512er);
+ debug_printf("util_cpu_caps.has_avx512cd = %u\n",
util_cpu_caps.has_avx512cd);
+ debug_printf("util_cpu_caps.has_avx512bw = %u\n",
util_cpu_caps.has_avx512bw);
+ debug_printf("util_cpu_caps.has_avx512vl = %u\n",
util_cpu_caps.has_avx512vl);
+ debug_printf("util_cpu_caps.has_avx512vbmi = %u\n",
util_cpu_caps.has_avx512vbmi);
}
#endif
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.h
b/src/gallium/auxiliary/util/u_cpu_detect.h
index 5ccfc93..b612a2c 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.h
+++ b/src/gallium/auxiliary/util/u_cpu_detect.h
@@ -71,6 +71,16 @@ struct util_cpu_caps {
unsigned has_xop:1;
unsigned has_altivec:1;
unsigned has_daz:1;
+
+ unsigned has_avx512f:1;
+ unsigned has_avx512dq:1;
+ unsigned has_avx512ifma:1;
+ unsigned has_avx512pf:1;
+ unsigned has_avx512er:1;
+ unsigned has_avx512cd:1;
+ unsigned has_avx512bw:1;
+ unsigned has_avx512vl:1;
+ unsigned has_avx512vbmi:1;
};
extern struct util_cpu_caps
--
1.9.1
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