The third release candidate for Mesa 12.0.0 is now available.
Note for distribution maintainers:
Mesa no longer provides a single VAAPI driver backend - gallium_drv_video.
With this release separate drivers are available analogous to DRI, XvMC and
VDPAU.
Anuj Phogat (3):
blorp: Fix 16x multisample scaled blits
mesa: Fix region overlap conditions for rectangles with a shared edge
gallium: Fix region overlap conditions for rectangles with a shared edge
Bas Nieuwenhuizen (1):
radeonsi: Reinitialize all descriptors in CE preamble.
Chuck Atkins (1):
swr: Add missing headers for package inclusion
Daniel Czarnowski (1):
glx: fix crash with bad fbconfig
Dave Airlie (10):
mesa/copyimage: fix num samples check to handle renderbuffers.
mesa/copyimage: report INVALID_VALUE for missing cube face
mesa/get: return correct value for layer provoking vertex.
glsl: handle ast_aggregate in has_sequence_subexpression. (v2)
glsl/ast: don't crash when func_name is NULL
glsl: for anonymous struct matching use without_array() (v3)
i965: don't use NumLayers for 3D textures.
glsl: geom shader max_vertices layout must match.
mesa/program_resource: return -1 for index if no location.
i965/gen8: fix cull distance emission for tessellation shaders.
Dylan Baker (1):
isl: Replace bash generator with python generator
Emil Velikov (7):
anv: add the X related and Wayland CFLAGS to VULKAN_ENTRYPOINT_CPPFLAGS
automake: get in-tree `make distclean' working again.
configure.ac: strip out the llvm-config -march/mtune flags
automake: add SWR to `make distcheck' gallium drivers
swr: automake: add missing -I flag
cherry-ignore: drop the "i965 bring back INTEL_PRECISE_TRIG"
Update version to 12.0.0-rc3
Eric Engestrom (1):
st/osmesa: remove double-write (overwriting)
Francisco Jerez (8):
i965/fs: Skip SIMD lowering destination zipping if possible.
i965/fs: Reindent emit_zip().
i965/vec4: Fix cmod propagation not to propagate non-identity cmod into
CMP(N).
Revert "i965/fs: Allow scalar source regions on SNB math instructions."
i965: Fix scratch overallocation if the original slot size was already a
power of two.
i965: Keep track of the per-thread scratch allocation in brw_stage_state.
i965: Fix cross-primitive scratch corruption when changing the per-thread
allocation.
i965/fs: Fix regs_written for SIMD-lowered instructions some more.
Ilia Mirkin (13):
nvc0: mark bound buffer range valid
nvc0: fix memory barrier flag handling
nvc0: reduce overhead from always marking buffers dirty
nvc0: reduce overhead from always marking images dirty
nv50,nvc0: fix BGR10_A2UI vertex format
gk104/ir: fix conditions for adding a texbar
st/mesa: revalidate image atoms when a texture is updated
st/mesa: use buffer usage history to set dirty flags for revalidation
GL: update glext to svn 32957
GL: update glcorearb.h to svn 32433
mesa: add drawbuffer argument to ClearNamedFramebufferfi
nvc0/ir: limit max number of regs based on availability in SM
nv50/ir: record number of threads in a compute shader
Jason Ekstrand (27):
anv/clear: Handle ClearImage on 3-D images
nir/lower_indirect_derefs: Use the direct array deref for recursion
anv/pipeline: Refactor specialization constant handling a bit
nir/spirv: Use breaks instead of returns in constant handling
nir/spirv: Handle the WorkgroupSize builtin decoration
genxml/gen6,7,75: s/BackFace/Backface
anv/pipeline: Unify gen7/8 emit_ds_state
anv/pipeline: Silently pass tests if depth or stencil is missing
i965/fs Add a wm_prog_data bit for has_side_effects
anv/pipeline: Add support for early depth stencil
nir/spirv: Complete the list of capabilities
nir/spirv: Add string lookup tables for a couple of SPIR-V enums
nir/spirv: Add a way to print non-fatal warnings
nir/spirv: Make unhandled decorations and capabilities non-fatal
nir/spirv: Make a decoration switch complete
anv/copy: Account for the anv_surface.offset when creating a blit2d_surf
anv/blit: Use CLAMP_TO_EDGE for scaled blits
i965: Emit surface states for extra planes prior to gen8
anv/descriptor_set: Set array_size to zero for non-existant descriptors
anv/descriptor_set: Add a type field in debug builds
anv/descriptor_set: Ensure that bindings are always in increasing order
anv/pipeline: Store the (set, binding, index) tripple in the bind map
anv/pipeline_cache: Allow for an zero-sized cache
anv: Remove the PhysicalDeviceLimits FINISHME
anv/entrypoints: Emit #if guards for all platforms
anv/entrypoints: Use the function pointer types provided by vulkan.h
anv/entrypoints: Rework #if guards
Jimmy Berry (1):
st/va: hardlink driver instances to gallium_drv_video.so
Kenneth Graunke (12):
i965: Fix shared local memory size for Gen9+.
i965: Set subslice_total on Gen7/7.5 platforms.
i965: Allocate scratch space for the maximum number of compute threads.
i965: Account for poor address calculations in Haswell CS scratch size.
i965: Fix Haswell CS per-thread scratch space encoding.
i965: Fix CS scratch size calculations on Ivybridge and Baytrail.
i965: Assert that the scratch spaces are in range.
i965: Use the correct number of threads for compute shaders.
i965: Don't leak scratch BOs for TCS/TES.
i965: Fix encode_slm_size() to take a generation, not a device info.
i965: Fix issues with number of VS URB entries on Cherryview/Broxton.
i965: Defeat the register stride checker in URB reads.
Leo Liu (2):
vl/dri3: get Makefile properly
vl/dri3: support receiving new pixmap for front buffer
Marc-André Lureau (1):
virgl: fix checking fences
Marek Olšák (2):
r600g: write WAIT_UNTIL in the correct place
gallium/radeon: don't allocate DCC for non-renderable texture formats
Nanley Chery (3):
mesa/extensions: Fix ES1 extension reporting
anv: Document and rename anv_pipeline_init_dynamic_state()
anv/pipeline: Don't dereference NULL dynamic state pointers
Nicolai Hähnle (5):
radeonsi: set descriptor dirty mask on shader buffer unbind
tgsi/scan: add uses_derivatives (v2)
st/mesa: directly compute level=0 texture size in st_finalize_texture
st/mesa: use base level size as "guess" when available
radeonsi: mark buffer texture range valid for shader images
Samuel Iglesias Gonsálvez (4):
i965/fs: fix FS_OPCODE_CINTERP for unpacked double input varyings
i965/fs: fix offset when loading double vector input varyings
i965/gs/scalar: Fix load input for doubles
i965: Defeat the register stride checker in pull uniform messages.
Samuel Pitoiset (5):
nvc0: mark buffer texture range valid for shader images
nvc0: re-validate images after launching a grid on Fermi
nvc0: do not clear surfaces bins in the validate function
nv50/ir: use round toward 0 when converting doubles to integers
nvc0/ir: clamp the UBO index for compute on Kepler
Timothy Arceri (1):
glsl: make sure UBO arrays are sized in ES
Tomasz Figa (1):
i965: Check return value of screen->image.loader->getBuffers (v2)
Vedran Miletić (1):
clover: Update OpenCL version string to match OpenGL
git tag: mesa-12.0.0-rc3
ftp://ftp.freedesktop.org/pub/mesa/12.0.0/mesa-12.0.0-rc3.tar.gz
MD5: 19171fb0cf402f5d7f7634a1665870c9 mesa-12.0.0-rc3.tar.gz
SHA1: 6679def477f60055d6289cc6f21fec7ef06e0aa1 mesa-12.0.0-rc3.tar.gz
SHA256: e5ca6e726c086c70582ca40d386073c64740b78bc164478f20a63196cc472f83
mesa-12.0.0-rc3.tar.gz
PGP: ftp://ftp.freedesktop.org/pub/mesa/12.0.0/mesa-12.0.0-rc3.tar.gz.sig
ftp://ftp.freedesktop.org/pub/mesa/12.0.0/mesa-12.0.0-rc3.tar.xz
MD5: 53495c9bb3e1a9b676e6ebd75936389a mesa-12.0.0-rc3.tar.xz
SHA1: 896f096463254a7374e15f13e1f6a29fc448182d mesa-12.0.0-rc3.tar.xz
SHA256: 29b3526e3e76cec4f84f3e2b17bfd0c3ab224ce305891471a47b02e81b4af6f5
mesa-12.0.0-rc3.tar.xz
PGP: ftp://ftp.freedesktop.org/pub/mesa/12.0.0/mesa-12.0.0-rc3.tar.xz.sig
--
-Emil
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