[Mesa-dev] [PATCH 21/29] radeon/r200: Use bitmask/ffs to iterate enabled clip planes.

[Mathias . Froehlich]

From: Mathias Fröhlich <mathias.froehl...@web.de>

Replaces an iterate and test bit in a bitmask loop by a
loop only iterating over the bits set in the bitmask.

v2: Use _mesa_bit_scan{,64} instead of open coding.
v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}.

Reviewed-by: Brian Paul <bri...@vmware.com>
Signed-off-by: Mathias Fröhlich <mathias.froehl...@web.de>
---
 src/mesa/drivers/dri/r200/r200_state.c     | 19 +++++++++----------
 src/mesa/drivers/dri/radeon/radeon_state.c | 19 +++++++++----------
 2 files changed, 18 insertions(+), 20 deletions(-)

diff --git a/src/mesa/drivers/dri/r200/r200_state.c 
b/src/mesa/drivers/dri/r200/r200_state.c
index 0e38afc..3671231 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -1360,18 +1360,17 @@ static void r200ClipPlane( struct gl_context *ctx, 
GLenum plane, const GLfloat *
 static void r200UpdateClipPlanes( struct gl_context *ctx )
 {
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   GLuint p;
+   GLbitfield mask = ctx->Transform.ClipPlanesEnabled;
 
-   for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
-      if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
-        GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+   while (mask) {
+      const int p = u_bit_scan(&mask);
+      GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
 
-        R200_STATECHANGE( rmesa, ucp[p] );
-        rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
-        rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
-        rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
-        rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
-      }
+      R200_STATECHANGE( rmesa, ucp[p] );
+      rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
+      rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
+      rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
+      rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
    }
 }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c 
b/src/mesa/drivers/dri/radeon/radeon_state.c
index 93bc0f9..c6b1f38 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -1134,18 +1134,17 @@ static void radeonClipPlane( struct gl_context *ctx, 
GLenum plane, const GLfloat
 static void radeonUpdateClipPlanes( struct gl_context *ctx )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   GLuint p;
+   GLbitfield mask = ctx->Transform.ClipPlanesEnabled;
 
-   for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
-      if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
-        GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
+   while (mask) {
+      const int p = u_bit_scan(&mask);
+      GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
 
-        RADEON_STATECHANGE( rmesa, ucp[p] );
-        rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
-        rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
-        rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
-        rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
-      }
+      RADEON_STATECHANGE( rmesa, ucp[p] );
+      rmesa->hw.ucp[p].cmd[UCP_X] = ip[0];
+      rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1];
+      rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2];
+      rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
    }
 }
 
-- 
2.5.5

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