Please ignore this patch. It doesn't work.
Marek
On Sun, Jun 5, 2016 at 5:07 PM, Marek Olšák <mar...@gmail.com> wrote:
> From: Marek Olšák <marek.ol...@amd.com>
>
> ---
> src/gallium/drivers/radeonsi/si_blit.c | 34
> +++++++++++++++++++++-------------
> 1 file changed, 21 insertions(+), 13 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_blit.c
> b/src/gallium/drivers/radeonsi/si_blit.c
> index 1c2c538..80844ec 100644
> --- a/src/gallium/drivers/radeonsi/si_blit.c
> +++ b/src/gallium/drivers/radeonsi/si_blit.c
> @@ -859,13 +859,13 @@ static bool do_hardware_msaa_resolve(struct
> pipe_context *ctx,
> unsigned sample_mask = ~0;
> struct pipe_resource *tmp, templ;
> struct pipe_blit_info blit;
> + unsigned i;
>
> - /* Check basic requirements for hw resolve. */
> + /* Check basic requirements for MSAA resolve. */
> if (!(info->src.resource->nr_samples > 1 &&
> info->dst.resource->nr_samples <= 1 &&
> !util_format_is_pure_integer(format) &&
> - !util_format_is_depth_or_stencil(format) &&
> - util_max_layer(info->src.resource, 0) == 0))
> + !util_format_is_depth_or_stencil(format)))
> return false;
>
> /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
> @@ -878,6 +878,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context
> *ctx,
>
> /* Check the remaining requirements for hw resolve. */
> if (util_max_layer(info->dst.resource, info->dst.level) == 0 &&
> + util_max_layer(info->src.resource, 0) == 0 &&
> !info->scissor_enable &&
> (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
>
> util_is_format_compatible(util_format_description(info->src.format),
> @@ -914,12 +915,12 @@ static bool do_hardware_msaa_resolve(struct
> pipe_context *ctx,
> * a temporary texture and blit.
> */
> memset(&templ, 0, sizeof(templ));
> - templ.target = PIPE_TEXTURE_2D;
> + templ.target = info->src.resource->target;
> templ.format = info->src.resource->format;
> templ.width0 = info->src.resource->width0;
> templ.height0 = info->src.resource->height0;
> templ.depth0 = 1;
> - templ.array_size = 1;
> + templ.array_size = info->src.resource->array_size;
> templ.usage = PIPE_USAGE_DEFAULT;
> templ.flags = R600_RESOURCE_FLAG_FORCE_TILING;
>
> @@ -927,14 +928,21 @@ static bool do_hardware_msaa_resolve(struct
> pipe_context *ctx,
> if (!tmp)
> return false;
>
> - /* resolve */
> - si_blitter_begin(ctx, SI_COLOR_RESOLVE |
> - (info->render_condition_enable ? 0 :
> SI_DISABLE_RENDER_COND));
> - util_blitter_custom_resolve_color(sctx->blitter, tmp, 0, 0,
> - info->src.resource, info->src.box.z,
> - sample_mask,
> sctx->custom_blend_resolve,
> - format);
> - si_blitter_end(ctx);
> + /* resolve all layers that need to be resolved */
> + assert(info->src.box.depth > 0);
> + for (i = 0; i < info->src.box.depth; i++) {
> + si_blitter_begin(ctx, SI_COLOR_RESOLVE |
> + (info->render_condition_enable ?
> + 0 : SI_DISABLE_RENDER_COND));
> + util_blitter_custom_resolve_color(sctx->blitter, tmp, 0,
> + info->src.box.z + i,
> + info->src.resource,
> + info->src.box.z + i,
> + sample_mask,
> + sctx->custom_blend_resolve,
> + format);
> + si_blitter_end(ctx);
> + }
>
> /* blit */
> blit = *info;
> --
> 2.7.4
>
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