On 20.04.2016 18:49, Bas Nieuwenhuizen wrote:
I have no source for the actual name of these fields, as these are not in the kernel headers. I hope they are clear though.Signed-off-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl> --- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- src/gallium/drivers/radeonsi/sid.h | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 305a70b..bd9a45c 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3821,8 +3821,8 @@ static void si_init_config(struct si_context *sctx) return; si_pm4_cmd_begin(pm4, PKT3_CONTEXT_CONTROL); - si_pm4_cmd_add(pm4, 0x80000000); - si_pm4_cmd_add(pm4, 0x80000000); + si_pm4_cmd_add(pm4, LOAD_CONTROL_UPDATE(1)); + si_pm4_cmd_add(pm4, SHADOW_ENABLE_UPDATE(1)); si_pm4_cmd_end(pm4, false); si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h index 516e114..6fb12f62 100644 --- a/src/gallium/drivers/radeonsi/sid.h +++ b/src/gallium/drivers/radeonsi/sid.h @@ -88,6 +88,9 @@ #define PKT3_INDEX_BASE 0x26 #define PKT3_DRAW_INDEX_2 0x27 #define PKT3_CONTEXT_CONTROL 0x28 +#define LOAD_CONTROL_UPDATE(x) (((x) & 0x1) << 31) +#define LOAD_CONTROL_CE_RAM_EN(x) (((x) & 0x1) << 28) +#define SHADOW_ENABLE_UPDATE(x) (((x) & 0x1) << 31)
In the docs I have here, they are called LOAD_ENABLE, LOAD_CE_RAM, and SHADOW_ENABLE, respectively.
#define PKT3_INDEX_TYPE 0x2A #define PKT3_DRAW_INDIRECT_MULTI 0x2C #define PKT3_DRAW_INDEX_AUTO 0x2D
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