On Sat, Apr 2, 2016 at 3:10 PM, Bas Nieuwenhuizen
<b...@basnieuwenhuizen.nl> wrote:
> Also removes PKT3_CONTEXT_CONTROL as that is already being done
> by si_begin_new_cs, when emitting init_config.
>
> Signed-off-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
> ---
> src/gallium/drivers/radeonsi/si_compute.c | 69
> +++++++++++++++-------------
> src/gallium/drivers/radeonsi/si_hw_context.c | 2 +
> src/gallium/drivers/radeonsi/si_pipe.h | 1 +
> 3 files changed, 40 insertions(+), 32 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_compute.c
> b/src/gallium/drivers/radeonsi/si_compute.c
> index 9c25335..7320ace 100644
> --- a/src/gallium/drivers/radeonsi/si_compute.c
> +++ b/src/gallium/drivers/radeonsi/si_compute.c
> @@ -226,6 +226,39 @@ static unsigned compute_num_waves_for_scratch(
> return scratch_waves;
> }
>
> +static void si_initialize_compute(struct si_context *sctx)
> +{
> + struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
> +
> + radeon_emit(cs, PKT3(PKT3_SET_SH_REG, 3, 0));
> + radeon_emit(cs, (R_00B810_COMPUTE_START_X - SI_SH_REG_OFFSET) >> 2);
Please use radeon_set_sh_reg_seq.
> + radeon_emit(cs, 0);
> + radeon_emit(cs, 0);
> + radeon_emit(cs, 0);
> +
> + radeon_emit(cs, PKT3(PKT3_SET_SH_REG, 3, 0));
> + radeon_emit(cs, (R_00B854_COMPUTE_RESOURCE_LIMITS - SI_SH_REG_OFFSET)
> >> 2);
Same here.
> + radeon_emit(cs, 0);
> + radeon_emit(cs, S_00B858_SH0_CU_EN(0xffff) |
> S_00B858_SH1_CU_EN(0xffff));
> + radeon_emit(cs, S_00B85C_SH0_CU_EN(0xffff) |
> S_00B85C_SH1_CU_EN(0xffff));
Please add a comment that these two write COMPUTE_STATIC_THREAD_MGMT_SE0-1.
We should also write COMPUTE_STATIC_THREAD_MGMT_SE2 and 3 on CIK and
later chips. They are not in the docs, but sid.h defines them.
Marek
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