I'd recommend doing this at a higher level. We've been doing this in NIR (in nir_opt_algebraic.py) for quite some time, and we've found that having x==0 instead of -abs(x)>=0 in higher-level IR helps other optimizations make progress. Maybe do this when translating out of TGSI?
On 03/30/2016 03:30 AM, Patrick Rudolph wrote: > It affects the game "RIFT" and fixes slightly wrong colors on > the player model, when using the nine state-tracker. > > Kind Regards, > Patrick > > On 2016-03-29 11:09 PM, Dave Airlie wrote: >> On 28 March 2016 at 19:52, <s...@das-labor.org> wrote: >>> From: Patrick Rudolph <s...@das-labor.org> >>> >>> Some apps set NEG and ABS on the source param to test for zero. >>> Use ALU_OP3_CNDE insted of ALU_OP3_CNDGE and unset both modifiers. >>> >>> It also removes the need for a MOV instruction, as ABS isn't >>> supported on op3. >>> >>> Tested on AMD CAYMAN and AMD RV770. >>> >>> Signed-off-by: Patrick Rudolph <s...@das-labor.org> >> >> Seems sane to me, does this help in any app in particular? >> >> Reviewed-by: Dave Airlie <airl...@redhat.com> >> >> I just have to remember to push this tomorrow. >> >> Dave. >> >>> --- >>> src/gallium/drivers/r600/r600_shader.c | 11 ++++++++++- >>> 1 file changed, 10 insertions(+), 1 deletion(-) >>> >>> diff --git a/src/gallium/drivers/r600/r600_shader.c >>> b/src/gallium/drivers/r600/r600_shader.c >>> index 77658f5..e5e2e3f 100644 >>> --- a/src/gallium/drivers/r600/r600_shader.c >>> +++ b/src/gallium/drivers/r600/r600_shader.c >>> @@ -7707,6 +7707,15 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx) >>> int i, r, j; >>> int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); >>> int temp_regs[3]; >>> + unsigned op; >>> + >>> + if (ctx->src[0].abs && ctx->src[0].neg) { >>> + op = ALU_OP3_CNDE; >>> + ctx->src[0].abs = 0; >>> + ctx->src[0].neg = 0; >>> + } else { >>> + op = ALU_OP3_CNDGE; >>> + } >>> >>> for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { >>> temp_regs[j] = 0; >>> @@ -7719,7 +7728,7 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx) >>> continue; >>> >>> memset(&alu, 0, sizeof(struct r600_bytecode_alu)); >>> - alu.op = ALU_OP3_CNDGE; >>> + alu.op = op; >>> r = tgsi_make_src_for_op3(ctx, temp_regs[0], i, >>> &alu.src[0], &ctx->src[0]); >>> if (r) >>> return r; >>> -- >>> 2.5.0 >>> >>> _______________________________________________ >>> mesa-dev mailing list >>> mesa-dev@lists.freedesktop.org >>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev > _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev