Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com> --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 41 ++----------------------- src/mesa/drivers/dri/i965/brw_context.h | 10 +++++++ src/mesa/drivers/dri/i965/brw_meta_util.c | 50 +++++++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/brw_meta_util.h | 6 ++++ 4 files changed, 69 insertions(+), 38 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 0379258..2cd596f 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -209,9 +209,7 @@ intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, void brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params) { - struct gl_context *ctx = &brw->ctx; uint32_t estimated_max_batch_usage = 1500; - bool check_aperture_failed_once = false; /* Flush the sampler and render caches. We definitely need to flush the * sampler cache so that we get updated contents from the render cache for @@ -223,11 +221,7 @@ brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params) brw_emit_mi_flush(brw); retry: - intel_batchbuffer_require_space(brw, estimated_max_batch_usage, RENDER_RING); - intel_batchbuffer_save_state(brw); - drm_intel_bo *saved_bo = brw->batch.bo; - uint32_t saved_used = USED_BATCH(brw->batch); - uint32_t saved_state_batch_offset = brw->batch.state_batch_offset; + brw_meta_begin(brw, estimated_max_batch_usage); switch (brw->gen) { case 6: @@ -243,37 +237,8 @@ retry: brw_meta_draw_rect(brw, params->num_layers); - /* Make sure we didn't wrap the batch unintentionally, and make sure we - * reserved enough space that a wrap will never happen. - */ - assert(brw->batch.bo == saved_bo); - assert((USED_BATCH(brw->batch) - saved_used) * 4 + - (saved_state_batch_offset - brw->batch.state_batch_offset) < - estimated_max_batch_usage); - /* Shut up compiler warnings on release build */ - (void)saved_bo; - (void)saved_used; - (void)saved_state_batch_offset; - - /* Check if the blorp op we just did would make our batch likely to fail to - * map all the BOs into the GPU at batch exec time later. If so, flush the - * batch and try again with nothing else in the batch. - */ - if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) { - if (!check_aperture_failed_once) { - check_aperture_failed_once = true; - intel_batchbuffer_reset_to_saved(brw); - intel_batchbuffer_flush(brw); - goto retry; - } else { - int ret = intel_batchbuffer_flush(brw); - WARN_ONCE(ret == -ENOSPC, - "i965: blorp emit exceeded available aperture space\n"); - } - } - - if (unlikely(brw->always_flush_batch)) - intel_batchbuffer_flush(brw); + if (!brw_meta_end(brw)) + goto retry; /* We've smashed all state compared to what the normal 3D pipeline * rendering tracks for GL. diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 6b82bea..ad69288 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -710,6 +710,14 @@ struct shader_times; struct brw_l3_config; +struct brw_meta_save_state { + uint32_t estimated_max_batch_usage; + drm_intel_bo *bo; + uint32_t batch_used; + uint32_t batch_offset; + bool check_aperture_failed_once; +}; + /** * brw_context is derived from gl_context. */ @@ -905,6 +913,8 @@ struct brw_context /* Whether a meta-operation is in progress. */ bool meta_in_progress; + struct brw_meta_save_state meta; + /* Whether the last depth/stencil packets were both NULL. */ bool no_depth_or_stencil; diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c index 1bda31f..6c4b3cb 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_util.c +++ b/src/mesa/drivers/dri/i965/brw_meta_util.c @@ -26,6 +26,8 @@ #include "vbo/vbo.h" #include "brw_defines.h" #include "brw_draw.h" +#include "brw_context.h" +#include "intel_batchbuffer.h" /** * Helper function for handling mirror image blits. @@ -174,3 +176,51 @@ brw_meta_draw_rect(struct brw_context *brw, int num_instances) 3 /* vertex count per instance */, false /* predicate_enable */); } + +void +brw_meta_begin(struct brw_context *brw, uint32_t estimated_max_batch_usage) +{ + intel_batchbuffer_require_space(brw, estimated_max_batch_usage, + RENDER_RING); + intel_batchbuffer_save_state(brw); + brw->meta.estimated_max_batch_usage = estimated_max_batch_usage; + brw->meta.bo = brw->batch.bo; + brw->meta.batch_used = USED_BATCH(brw->batch); + brw->meta.batch_offset = brw->batch.state_batch_offset; + brw->meta.check_aperture_failed_once = false; +} + +bool +brw_meta_end(struct brw_context *brw) +{ + /* Make sure we didn't wrap the batch unintentionally, and make sure we + * reserved enough space that a wrap will never happen. + */ + assert(brw->batch.bo == brw->meta.bo); + assert((USED_BATCH(brw->batch) - brw->meta.batch_used) * 4 + + (brw->meta.batch_offset - brw->batch.state_batch_offset) < + brw->meta.estimated_max_batch_usage); + + /* Check if the blorp op we just did would make our batch likely to fail to + * map all the BOs into the GPU at batch exec time later. If so, flush the + * batch and try again with nothing else in the batch. + */ + if (dri_bufmgr_check_aperture_space(&brw->batch.bo, 1)) { + if (!brw->meta.check_aperture_failed_once) { + brw->meta.check_aperture_failed_once = true; + intel_batchbuffer_reset_to_saved(brw); + intel_batchbuffer_flush(brw); + return false; + } else { + struct gl_context *ctx = &brw->ctx; + int ret = intel_batchbuffer_flush(brw); + WARN_ONCE(ret == -ENOSPC, + "i965: meta emit exceeded available aperture space\n"); + } + } + + if (unlikely(brw->always_flush_batch)) + intel_batchbuffer_flush(brw); + + return true; +} diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.h b/src/mesa/drivers/dri/i965/brw_meta_util.h index 0a399cd..13dbf15 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_util.h +++ b/src/mesa/drivers/dri/i965/brw_meta_util.h @@ -43,6 +43,12 @@ brw_meta_mirror_clip_and_scissor(const struct gl_context *ctx, struct brw_context; +void +brw_meta_begin(struct brw_context *brw, uint32_t estimated_max_batch_usage); + +bool +brw_meta_end(struct brw_context *brw); + void brw_meta_draw_rect(struct brw_context *brw, int num_instances); #ifdef __cplusplus -- 2.5.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev