Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
Thanks for taking care of it!
On Sun, Feb 21, 2016 at 1:40 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:
> Actually OP_SELP doesn't need to be a compare instruction. Instead we
> just need to set the NOT modifier when building the instruction.
> While we are at it, fix the dst register type and use a GPR.
>
> Suggested by Ilia Mirkin.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 8 ++++----
> src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 8 ++++----
> src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h | 4 ++--
> src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 8 ++++----
> 4 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> index 8268e08..a78b3f9 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> @@ -112,7 +112,7 @@ private:
>
> void emitSET(const CmpInstruction *);
> void emitSLCT(const CmpInstruction *);
> - void emitSELP(const CmpInstruction *);
> + void emitSELP(const Instruction *);
>
> void emitTEXBAR(const Instruction *);
> void emitTEX(const TexInstruction *);
> @@ -1045,11 +1045,11 @@ CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
> }
> }
>
> -void CodeEmitterGK110::emitSELP(const CmpInstruction *i)
> +void CodeEmitterGK110::emitSELP(const Instruction *i)
> {
> emitForm_21(i, 0x250, 0x050);
>
> - if ((i->setCond == CC_NOT_P) ^ (bool)(i->src(2).mod &
> Modifier(NV50_IR_MOD_NOT)))
> + if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
> code[1] |= 1 << 13;
> }
>
> @@ -1937,7 +1937,7 @@ CodeEmitterGK110::emitInstruction(Instruction *insn)
> emitSET(insn->asCmp());
> break;
> case OP_SELP:
> - emitSELP(insn->asCmp());
> + emitSELP(insn);
> break;
> case OP_SLCT:
> emitSLCT(insn->asCmp());
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> index d588d7e..65fcd64 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> @@ -120,7 +120,7 @@ private:
>
> void emitSET(const CmpInstruction *);
> void emitSLCT(const CmpInstruction *);
> - void emitSELP(const CmpInstruction *);
> + void emitSELP(const Instruction *);
>
> void emitTEXBAR(const Instruction *);
> void emitTEX(const TexInstruction *);
> @@ -1175,11 +1175,11 @@ CodeEmitterNVC0::emitSLCT(const CmpInstruction *i)
> code[0] |= 1 << 5;
> }
>
> -void CodeEmitterNVC0::emitSELP(const CmpInstruction *i)
> +void CodeEmitterNVC0::emitSELP(const Instruction *i)
> {
> emitForm_A(i, HEX64(20000000, 00000004));
>
> - if (i->setCond == CC_NOT_P || i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
> + if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
> code[1] |= 1 << 20;
> }
>
> @@ -2438,7 +2438,7 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn)
> emitSET(insn->asCmp());
> break;
> case OP_SELP:
> - emitSELP(insn->asCmp());
> + emitSELP(insn);
> break;
> case OP_SLCT:
> emitSLCT(insn->asCmp());
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
> index 02e6157..e465f24 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_inlines.h
> @@ -281,14 +281,14 @@ Value *TexInstruction::getIndirectS() const
>
> CmpInstruction *Instruction::asCmp()
> {
> - if (op >= OP_SET_AND && op <= OP_SLCT)
> + if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP)
> return static_cast<CmpInstruction *>(this);
> return NULL;
> }
>
> const CmpInstruction *Instruction::asCmp() const
> {
> - if (op >= OP_SET_AND && op <= OP_SLCT)
> + if (op >= OP_SET_AND && op <= OP_SLCT && op != OP_SELP)
> return static_cast<const CmpInstruction *>(this);
> return NULL;
> }
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index 21a6f1e..d181f15 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -1067,10 +1067,10 @@ NVC0LoweringPass::handleSharedATOM(Instruction *atom)
> TYPE_U32, ld->getDef(0), atom->getSrc(1));
> set->setPredicate(CC_P, ld->getDef(1));
>
> - CmpInstruction *selp =
> - bld.mkCmp(OP_SELP, CC_NOT_P, TYPE_U32, bld.getSSA(4, FILE_ADDRESS),
> - TYPE_U32, ld->getDef(0), atom->getSrc(2),
> - set->getDef(0));
> + Instruction *selp =
> + bld.mkOp3(OP_SELP, TYPE_U32, bld.getSSA(), ld->getDef(0),
> + atom->getSrc(2), set->getDef(0));
> + selp->src(2).mod = Modifier(NV50_IR_MOD_NOT);
> selp->setPredicate(CC_P, ld->getDef(1));
>
> stVal = selp->getDef(0);
> --
> 2.6.4
>
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