On 02/15/2016 12:45 AM, Ilia Mirkin wrote:
On Sun, Feb 14, 2016 at 6:23 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:


On 02/14/2016 04:18 AM, Ilia Mirkin wrote:

In a situation where the seamless setting isn't available on a
per-texture basis (G200+ Teslas, and all Fermis), assume that all
samplers will have it identically set, and enable accordingly.

This fixes arb_seamless_cubemap piglit test on Fermi and Tesla.

Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
---
   src/gallium/drivers/nouveau/nv50/nv50_context.h      | 1 +
   src/gallium/drivers/nouveau/nv50/nv50_screen.c       | 2 +-
   src/gallium/drivers/nouveau/nv50/nv50_screen.h       | 1 +
   src/gallium/drivers/nouveau/nv50/nv50_state.c        | 2 ++
   src/gallium/drivers/nouveau/nv50/nv50_stateobj_tex.h | 1 +
   src/gallium/drivers/nouveau/nv50/nv50_tex.c          | 1 +
   src/gallium/drivers/nouveau/nv50/nv50_vbo.c          | 8 ++++++++
   src/gallium/drivers/nouveau/nvc0/nvc0_context.h      | 1 +
   src/gallium/drivers/nouveau/nvc0/nvc0_screen.c       | 3 +--
   src/gallium/drivers/nouveau/nvc0/nvc0_screen.h       | 1 +
   src/gallium/drivers/nouveau/nvc0/nvc0_tex.c          | 1 +
   src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c          | 8 ++++++++
   12 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h
b/src/gallium/drivers/nouveau/nv50/nv50_context.h
index 23d8210..2620d03 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.h
@@ -153,6 +153,7 @@ struct nv50_context {
      uint32_t textures_coherent[3];
      struct nv50_tsc_entry *samplers[3][PIPE_MAX_SAMPLERS];
      unsigned num_samplers[3];
+   bool seamless_cube_map;

      uint8_t num_so_targets;
      uint8_t so_targets_dirty;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 14d0085..c0dc6b8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -562,7 +562,7 @@ nv50_screen_init_hwctx(struct nv50_screen *screen)

      if (screen->tesla->oclass >= NVA0_3D_CLASS) {
         BEGIN_NV04(push, SUBC_3D(NVA0_3D_TEX_MISC), 1);
-      PUSH_DATA (push, NVA0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
+      PUSH_DATA (push, 0);


This is not documented in rnndb, do you know what's the meaning of 0 here?
If so, could you please update the doc?

0 = none of the bits are turned on... I don't think that really
requires extra documentation...

...
Forget my comment.




      }

      BEGIN_NV04(push, NV50_3D(SCREEN_Y_CONTROL), 1);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.h
b/src/gallium/drivers/nouveau/nv50/nv50_screen.h
index 2a4983d..328424a 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.h
@@ -50,6 +50,7 @@ struct nv50_graph_state {
      uint8_t num_samplers[3];
      uint8_t prim_size;
      uint16_t scissor;
+   bool seamless_cube_map;
   };

   struct nv50_screen {
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c
b/src/gallium/drivers/nouveau/nv50/nv50_state.c
index cb04043..844b276 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c
@@ -510,6 +510,8 @@ nv50_sampler_state_create(struct pipe_context *pipe,
            so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS;
         if (!cso->normalized_coords)
            so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS;
+   } else {
+      so->seamless_cube_map = cso->seamless_cube_map;
      }

      if (cso->max_anisotropy >= 16)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_stateobj_tex.h
b/src/gallium/drivers/nouveau/nv50/nv50_stateobj_tex.h
index e0793bb..6bc4514 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_stateobj_tex.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_stateobj_tex.h
@@ -7,6 +7,7 @@
   struct nv50_tsc_entry {
      int id;
      uint32_t tsc[8];
+   bool seamless_cube_map;
   };

   static inline struct nv50_tsc_entry *
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_tex.c
b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
index c3f4336..1ff9293 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
@@ -364,6 +364,7 @@ nv50_validate_tsc(struct nv50_context *nv50, int s)
            PUSH_DATA (push, (i << 4) | 0);
            continue;
         }
+      nv50->seamless_cube_map = tsc->seamless_cube_map;
         if (tsc->id < 0) {
            tsc->id = nv50_screen_tsc_alloc(nv50->screen, tsc);

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
index 5369d52..56bdc68 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_vbo.c
@@ -816,6 +816,14 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct
pipe_draw_info *info)
         PUSH_DATA (push, 0x20);
      }

+   if (nv50->screen->base.class_3d >= NVA0_3D_CLASS &&
+       nv50->seamless_cube_map != nv50->state.seamless_cube_map) {
+      nv50->state.seamless_cube_map = nv50->seamless_cube_map;
+      BEGIN_NV04(push, SUBC_3D(NVA0_3D_TEX_MISC), 1);
+      PUSH_DATA (push, NVA0_3D_TEX_MISC_SEAMLESS_CUBE_MAP *
nv50->seamless_cube_map);


Well, I know that nv50->seamless_cube_map is a boolean, but this looks like
a bit strange to me actually. :-)
What about nv50->seamless_cube_map ? NVA0_3D_TEX_MISC_SEAMLESS_CUBE_MAP : 0
?

bleh, extra characters, how I hate them... I think * bool is a
reasonably common pattern, no?


Btw, you have an extra empty line below.


+   }
+
+
      if (nv50->vbo_fifo) {
         nv50_push_vbo(nv50, info);
         push->kick_notify = nv50_default_kick_notify;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index b3a55e8..191aa3c 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -157,6 +157,7 @@ struct nvc0_context {
      struct nv50_tsc_entry *samplers[6][PIPE_MAX_SAMPLERS];
      unsigned num_samplers[6];
      uint16_t samplers_dirty[6];
+   bool seamless_cube_map;

      uint32_t tex_handles[6][PIPE_MAX_SAMPLERS]; /* for nve4 */

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 2b12de4..dc798ad 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -862,8 +862,7 @@ nvc0_screen_create(struct nouveau_device *dev)
      BEGIN_NVC0(push, NVC0_3D(SHADE_MODEL), 1);
      PUSH_DATA (push, NVC0_3D_SHADE_MODEL_SMOOTH);
      if (screen->eng3d->oclass < NVE4_3D_CLASS) {
-      BEGIN_NVC0(push, NVC0_3D(TEX_MISC), 1);
-      PUSH_DATA (push, NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
+      IMMED_NVC0(push, NVC0_3D(TEX_MISC), 0);
      } else {
         BEGIN_NVC0(push, NVE4_3D(TEX_CB_INDEX), 1);
         PUSH_DATA (push, 15);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
index 1a56177..2e03157 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h
@@ -53,6 +53,7 @@ struct nvc0_graph_state {
      uint32_t clip_mode;
      uint32_t uniform_buffer_bound[5];
      struct nvc0_transform_feedback_state *tfb;
+   bool seamless_cube_map;
   };

   struct nvc0_screen {
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index 7223f5a..69527c1 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -410,6 +410,7 @@ nvc0_validate_tsc(struct nvc0_context *nvc0, int s)
            commands[n++] = (i << 4) | 0;
            continue;
         }
+      nvc0->seamless_cube_map = tsc->seamless_cube_map;
         if (tsc->id < 0) {
            tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc);

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
index 032b3c1..2505cd4 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
@@ -984,6 +984,14 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct
pipe_draw_info *info)
         }
      }

+   if (nvc0->screen->base.class_3d < NVE4_3D_CLASS &&
+       nvc0->seamless_cube_map != nvc0->state.seamless_cube_map) {
+      nvc0->state.seamless_cube_map = nvc0->seamless_cube_map;
+      PUSH_SPACE(push, 1);
+      IMMED_NVC0(push, NVC0_3D(TEX_MISC),
NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP
+                 * nvc0->seamless_cube_map);
+   }
+
      push->kick_notify = nvc0_draw_vbo_kick_notify;

      for (s = 0; s < 5 && !nvc0->cb_dirty; ++s) {


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