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On 08/17/2011 05:55 PM, Eric Anholt wrote:
> Improves performance of a GL_TEXTURE_RECTANGLE microbenchmark by 1.84%
> +/- .15% (n=3)
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 ++-
> src/mesa/drivers/dri/i965/brw_wm_fp.c | 4 +++-
> src/mesa/drivers/dri/i965/brw_wm_sampler_state.c | 7 +++++++
> src/mesa/drivers/dri/i965/gen7_sampler_state.c | 7 +++++++
> 4 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 2dc9132..828cb63 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -1025,7 +1025,8 @@ fs_visitor::visit(ir_texture *ir)
> * texture coordinates. We use the program parameter state
> * tracking to get the scaling factor.
> */
> - if (ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_RECT) {
> + if (intel->gen < 6 &&
> + ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_RECT) {
> struct gl_program_parameter_list *params =
> c->fp->program.Base.Parameters;
> int tokens[STATE_LENGTH] = {
> STATE_INTERNAL,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c
> b/src/mesa/drivers/dri/i965/brw_wm_fp.c
> index d52a958..bd46bd8 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
> @@ -664,6 +664,8 @@ static void precalc_lit( struct brw_wm_compile *c,
> static void precalc_tex( struct brw_wm_compile *c,
> const struct prog_instruction *inst )
> {
> + struct brw_compile *p = &c->func;
> + struct intel_context *intel = &p->brw->intel;
> struct prog_src_register coord;
> struct prog_dst_register tmpcoord = { 0 };
> const GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit];
> @@ -727,7 +729,7 @@ static void precalc_tex( struct brw_wm_compile *c,
> release_temp(c, tmp0);
> release_temp(c, tmp1);
> }
> - else if (inst->TexSrcTarget == TEXTURE_RECT_INDEX) {
> + else if (intel->gen < 6 && inst->TexSrcTarget == TEXTURE_RECT_INDEX) {
> struct prog_src_register scale =
> search_or_add_param5( c,
> STATE_INTERNAL,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
> b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
> index 9814613..6834eba 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
> @@ -289,6 +289,13 @@ static void brw_update_sampler_state(struct brw_context
> *brw,
> sampler->ss1.max_lod = U_FIXED(CLAMP(gl_sampler->MaxLod, 0, 13), 6);
> sampler->ss1.min_lod = U_FIXED(CLAMP(gl_sampler->MinLod, 0, 13), 6);
>
> + /* On Gen6+, the sampler can handle non-normalized texture
> + * rectangle coordinates natively
> + */
> + if (intel->gen >= 6 && texObj->Target == GL_TEXTURE_RECTANGLE) {
> + sampler->ss3.non_normalized_coord = 1;
> + }
> +
> upload_default_color(brw, gl_sampler, unit);
>
> if (intel->gen >= 6) {
> diff --git a/src/mesa/drivers/dri/i965/gen7_sampler_state.c
> b/src/mesa/drivers/dri/i965/gen7_sampler_state.c
> index e787c21..dca705b 100644
> --- a/src/mesa/drivers/dri/i965/gen7_sampler_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_sampler_state.c
> @@ -157,6 +157,13 @@ gen7_update_sampler_state(struct brw_context *brw, int
> unit,
> sampler->ss1.max_lod = U_FIXED(CLAMP(gl_sampler->MaxLod, 0, 13), 8);
> sampler->ss1.min_lod = U_FIXED(CLAMP(gl_sampler->MinLod, 0, 13), 8);
>
> + /* On Gen6+, the sampler can handle non-normalized texture
> + * rectangle coordinates natively
> + */
> + if (intel->gen >= 6 && texObj->Target == GL_TEXTURE_RECTANGLE) {
Is the gen >=6 test really neccesary in the gen7-specific routine? This
seems like a copy-and-paste. :)
> + sampler->ss3.non_normalized_coord = 1;
> + }
> +
> upload_default_color(brw, gl_sampler, unit);
>
> sampler->ss2.default_color_pointer = brw->wm.sdc_offset[unit] >> 5;
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