On 12/15/2015 12:28 AM, Kristian Høgsberg Kristensen wrote:
> This optimizes a + b - b to just a. Modest shader-db results (BDW):
>
> total instructions in shared programs: 7842452 -> 7841862 (-0.01%)
> instructions in affected programs: 61938 -> 61348 (-0.95%)
> total loops in shared programs: 2131 -> 2131 (0.00%)
> helped: 263
> HURT: 0
> GAINED: 0
> LOST: 0
>
> but the optimization turns
>
> gl_VertexID - gl_BaseVertexARB
>
> into just a reference to SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, which the
> i965 hardware supports natively. That means we can avoid using the
> internal vertex buffer for gl_BaseVertexARB in this case.
Removing that extra state should be a bigger real win than removing the
instructions. This patch is
Reviewed-by: Ian Romanick <ian.d.roman...@intel.com>
> ---
> src/glsl/nir/nir_opt_algebraic.py | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/src/glsl/nir/nir_opt_algebraic.py
> b/src/glsl/nir/nir_opt_algebraic.py
> index cb715c0..1fdad3d 100644
> --- a/src/glsl/nir/nir_opt_algebraic.py
> +++ b/src/glsl/nir/nir_opt_algebraic.py
> @@ -62,6 +62,10 @@ optimizations = [
> (('iadd', ('imul', a, b), ('imul', a, c)), ('imul', a, ('iadd', b, c))),
> (('fadd', ('fneg', a), a), 0.0),
> (('iadd', ('ineg', a), a), 0),
> + (('iadd', ('ineg', a), ('iadd', a, b)), b),
> + (('iadd', a, ('iadd', ('ineg', a), b)), b),
> + (('fadd', ('fneg', a), ('fadd', a, b)), b),
> + (('fadd', a, ('fadd', ('fneg', a), b)), b),
> (('fmul', a, 0.0), 0.0),
> (('imul', a, 0), 0),
> (('umul_unorm_4x8', a, 0), 0),
>
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