That texture mask thing doesn't seem to be needed for surface ops, so
just as nve4+, let do that only for texture ops.
This fixes a segfault with 'test_surface_st' from
gallium/tests/trivial/compute.c on Fermi because this test uses sustp.
While we are it, apply the same change for Tesla.
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 41d2cc9..d186c07 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -2084,7 +2084,8 @@
RegAlloc::InsertConstraintsPass::texConstraintNVC0(TexInstruction *tex)
{
int n, s;
- textureMask(tex);
+ if (isTextureOp(tex->op))
+ textureMask(tex);
if (tex->op == OP_TXQ) {
s = tex->srcCount(0xff);
@@ -2115,7 +2116,8 @@
RegAlloc::InsertConstraintsPass::texConstraintNV50(TexInstruction *tex)
if (pred)
tex->setPredicate(tex->cc, NULL);
- textureMask(tex);
+ if (isTextureOp(tex->op))
+ textureMask(tex);
assert(tex->defExists(0) && tex->srcExists(0));
// make src and def count match
--
2.6.2
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