git://people.freedesktop.org/~jljusten/mesa cs-shared-variables-v3 http://patchwork.freedesktop.org/bundle/jljusten/cs-shared-variables-v3
I received lots of good suggestions for v2 of the series, and the patches needed a rebase. Thanks! So far 33 of the 44 patches have a Reviewed-by. The patchwork link above shows which patches have been reviewed. For reference, here is the cover letter for v2 of the series: http://lists.freedesktop.org/archives/mesa-dev/2015-November/100564.html Francisco Jerez (16): i965: Define symbolic constants for some useful L3 cache control registers. i965: Adjust gen check in can_do_pipelined_register_writes i965: Keep track of whether LRI is allowed in the context struct. i965: Define state flag to signal that the URB size has been altered. i965/gen8: Don't add workaround bits to PIPE_CONTROL stalls if DC flush is set. i965: Add slice count to the brw_device_info structure. i965: Import tables enumerating the set of validated L3 configurations. i965: Implement programming of the L3 configuration. i965/hsw: Enable L3 atomics. i965: Define and use REG_MASK macro to make masked MMIO writes slightly more readable. i965: Implement selection of the closest L3 configuration based on a vector of weights. i965: Calculate appropriate L3 partition weights for the current pipeline state. i965: Implement L3 state atom. i965: Add debug flag to print out the new L3 state during transitions. i965: Work around L3 state leaks during context switches. i965: Hook up L3 partitioning state atom. Iago Toral Quiroga (1): glsl: Don't assert on shared variable matrices with 'inherited' layout Jordan Justen (27): glsl ubo/ssbo: Use enum to track current buffer access type glsl ubo/ssbo: Split buffer access to insert_buffer_access glsl ubo/ssbo: Add lower_buffer_access class glsl ubo/ssbo: Move is_dereferenced_thing_row_major into lower_buffer_access glsl ubo/ssbo: Move common code into lower_buffer_access::setup_buffer_access glsl: Remove mem_ctx as member variable in lower_ubo_reference_visitor glsl: Don't lower_variable_index_to_cond_assign for shared variables glsl: Add lowering pass for shared variable references nir: Translate glsl shared var load intrinsic to nir intrinsic nir: Translate glsl shared var store intrinsic to nir intrinsic i965: Disable vector splitting on shared variables i965/fs: Handle nir shared variable load intrinsic i965/fs: Handle nir shared variable store intrinsic i965: Enable shared local memory for CS shared variables i965: Lower shared variable references to intrinsic calls glsl: Allow atomic functions to be used with shared variables glsl: Replace atomic_ssbo and ssbo_atomic with atomic glsl: Check for SSBO variable in SSBO atomic lowering glsl: Check for SSBO variable in check_for_ssbo_store glsl: Translate atomic intrinsic functions on shared variables glsl: Buffer atomics are supported for compute shaders glsl: Disable several optimizations on shared variables nir: Add nir intrinsics for shared variable atomic operations i965/nir: Implement shared variable atomic operations i965: Enable ARB_compute_shader extension on supported hardware docs: Mark ARB_compute_shader as done for i965 docs: Add ARB_compute_shader to 11.2.0 release notes docs/GL3.txt | 4 +- docs/relnotes/11.2.0.html | 1 + src/glsl/Makefile.sources | 3 + src/glsl/ast_function.cpp | 18 +- src/glsl/builtin_functions.cpp | 236 ++++---- src/glsl/ir_optimization.h | 1 + src/glsl/linker.cpp | 4 + src/glsl/lower_buffer_access.cpp | 490 +++++++++++++++++ src/glsl/lower_buffer_access.h | 65 +++ src/glsl/lower_shared_reference.cpp | 495 +++++++++++++++++ src/glsl/lower_ubo_reference.cpp | 601 ++++----------------- src/glsl/lower_variable_index_to_cond_assign.cpp | 3 + src/glsl/nir/glsl_to_nir.cpp | 145 ++++- src/glsl/nir/nir_intrinsics.h | 31 +- src/glsl/opt_constant_propagation.cpp | 3 +- src/glsl/opt_constant_variable.cpp | 3 +- src/glsl/opt_copy_propagation.cpp | 3 +- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_compiler.h | 1 + src/mesa/drivers/dri/i965/brw_context.c | 11 +- src/mesa/drivers/dri/i965/brw_context.h | 17 +- src/mesa/drivers/dri/i965/brw_cs.c | 13 + src/mesa/drivers/dri/i965/brw_defines.h | 8 + src/mesa/drivers/dri/i965/brw_device_info.c | 20 + src/mesa/drivers/dri/i965/brw_device_info.h | 5 + src/mesa/drivers/dri/i965/brw_fs.h | 2 + src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 138 +++++ .../drivers/dri/i965/brw_fs_vector_splitting.cpp | 1 + src/mesa/drivers/dri/i965/brw_pipe_control.c | 4 +- src/mesa/drivers/dri/i965/brw_shader.cpp | 3 + src/mesa/drivers/dri/i965/brw_state.h | 5 + src/mesa/drivers/dri/i965/brw_state_upload.c | 7 +- src/mesa/drivers/dri/i965/gen7_cs_state.c | 12 + src/mesa/drivers/dri/i965/gen7_l3_state.c | 566 +++++++++++++++++++ src/mesa/drivers/dri/i965/gen7_urb.c | 3 + src/mesa/drivers/dri/i965/intel_batchbuffer.c | 7 + src/mesa/drivers/dri/i965/intel_batchbuffer.h | 6 +- src/mesa/drivers/dri/i965/intel_debug.c | 1 + src/mesa/drivers/dri/i965/intel_debug.h | 1 + src/mesa/drivers/dri/i965/intel_extensions.c | 13 +- src/mesa/drivers/dri/i965/intel_reg.h | 55 +- src/mesa/main/mtypes.h | 7 + 42 files changed, 2374 insertions(+), 639 deletions(-) create mode 100644 src/glsl/lower_buffer_access.cpp create mode 100644 src/glsl/lower_buffer_access.h create mode 100644 src/glsl/lower_shared_reference.cpp create mode 100644 src/mesa/drivers/dri/i965/gen7_l3_state.c -- 2.6.2 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
