On Tue, 2015-11-17 at 21:55 -0800, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 60
> ++++++++++++++++++++++++++++++++
> 2 files changed, 62 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index cbfc07f..1c9b4c3 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -276,6 +276,8 @@ public:
> nir_intrinsic_instr *instr);
> void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
> int op, nir_intrinsic_instr *instr);
> + void nir_emit_shared_atomic(const brw::fs_builder &bld,
> + int op, nir_intrinsic_instr *instr);
> void nir_emit_texture(const brw::fs_builder &bld,
> nir_tex_instr *instr);
> void nir_emit_jump(const brw::fs_builder &bld,
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index c8c6370..792fda7 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1967,6 +1967,37 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder
> &bld,
> break;
> }
>
> + case nir_intrinsic_shared_atomic_add:
> + nir_emit_shared_atomic(bld, BRW_AOP_ADD, instr);
> + break;
> + case nir_intrinsic_shared_atomic_min:
> + if (dest.type == BRW_REGISTER_TYPE_D)
> + nir_emit_shared_atomic(bld, BRW_AOP_IMIN, instr);
> + else
> + nir_emit_shared_atomic(bld, BRW_AOP_UMIN, instr);
> + break;
> + case nir_intrinsic_shared_atomic_max:
> + if (dest.type == BRW_REGISTER_TYPE_D)
> + nir_emit_shared_atomic(bld, BRW_AOP_IMAX, instr);
> + else
> + nir_emit_shared_atomic(bld, BRW_AOP_UMAX, instr);
> + break;
As explained in the previous patch, this implementation of min/max won't
work. Check the ssbo implementation in master.
> + case nir_intrinsic_shared_atomic_and:
> + nir_emit_shared_atomic(bld, BRW_AOP_AND, instr);
> + break;
> + case nir_intrinsic_shared_atomic_or:
> + nir_emit_shared_atomic(bld, BRW_AOP_OR, instr);
> + break;
> + case nir_intrinsic_shared_atomic_xor:
> + nir_emit_shared_atomic(bld, BRW_AOP_XOR, instr);
> + break;
> + case nir_intrinsic_shared_atomic_exchange:
> + nir_emit_shared_atomic(bld, BRW_AOP_MOV, instr);
> + break;
> + case nir_intrinsic_shared_atomic_comp_swap:
> + nir_emit_shared_atomic(bld, BRW_AOP_CMPWR, instr);
> + break;
> +
> default:
> nir_emit_intrinsic(bld, instr);
> break;
> @@ -2607,6 +2638,35 @@ fs_visitor::nir_emit_ssbo_atomic(const fs_builder &bld,
> }
>
> void
> +fs_visitor::nir_emit_shared_atomic(const fs_builder &bld,
> + int op, nir_intrinsic_instr *instr)
> +{
> + fs_reg dest;
> + if (nir_intrinsic_infos[instr->intrinsic].has_dest)
> + dest = get_nir_dest(instr->dest);
> +
> + unsigned index = BRW_SLM_SURFACE_INDEX;
> + fs_reg surface = fs_reg(index);
fs_reg surface = brw_imm_ud(BRW_SLM_SURFACE_INDEX) and remove the index
variable.
Iago
> + fs_reg offset = get_nir_src(instr->src[0]);
> + fs_reg data1 = get_nir_src(instr->src[1]);
> + fs_reg data2;
> + if (op == BRW_AOP_CMPWR)
> + data2 = get_nir_src(instr->src[2]);
> +
> + /* Emit the actual atomic operation operation */
> +
> + fs_reg atomic_result =
> + surface_access::emit_untyped_atomic(bld, surface, offset,
> + data1, data2,
> + 1 /* dims */, 1 /* rsize */,
> + op,
> + BRW_PREDICATE_NONE);
> + dest.type = atomic_result.type;
> + bld.MOV(dest, atomic_result);
> +}
> +
> +void
> fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
> {
> unsigned sampler = instr->sampler_index;
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