On Tue, May 10, 2011 at 12:00 AM, Ian Romanick <i...@freedesktop.org> wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > On 05/09/2011 11:03 AM, Marek Olšák wrote: >> Module: Mesa >> Branch: master >> Commit: 801fbdf286bed58435ca3a9008104b098717ed9b >> URL: >> http://cgit.freedesktop.org/mesa/mesa/commit/?id=801fbdf286bed58435ca3a9008104b098717ed9b >> >> Author: Marek Olšák <mar...@gmail.com> >> Date: Mon May 9 18:18:56 2011 +0200 >> >> mesa: document instructions ir_to_mesa emits >> >> GLSL stopped using: >> BRA, EXP, LOG, LRP, NRM3, NRM4, XPD. >> >> GLSL started using: >> KIL, SCS, SSG, SWZ. >> (omg why SWZ? isn't proc_src_register flexible enough?) > > The problem is that some architectures (e.g., Nvidia, i965) can only use > that flexibility with the special SWZ instruction. As far as I'm aware, > the back-ends for architectures that can use that flexibility (e.g., > i915) aren't expecting it. I'm not sure prog_exec will work with that > either. > >> GLSL doesn't use these opcodes some Radeons do support: >> ARR, DP2A, DST, LRP, XPD. >> >> These opcodes are now unused: >> AND, NOT, NRM3, NRM4, OR, XOR. >> (plus maybe the NV extensions which are unused by Gallium) >> >> In addition to that, we don't use two-dimensional indirect addressing, >> which the Mesa IR can do. > > You mean things like: > > MOV R0, array[A0.x + 5];
prog_src_register::RelAddr2 surprised me so much that I didn't see the comment in front of it. :) It seems to be for geometry shaders. The expected usage is INPUT[vertex_index][attrib_index]. Marek _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
