Hi, Since the lazy gpu flush changes for r600g about two weeks ago, I get broken mipmaps on my notebooks rv635. I am not sure if my analysis is right, but it appears to me that flushing the destination caches like it is done in r600_context_flush_dest_caches is not sufficient for my rv635. Since then, I need the attached patch to get correct automatically generated mipmaps. The important callpath for my observed breakage is when r600_context_flush_dest_caches is called from r600_set_framebuffer_state, which is called on each new mipmap level. With the attached change it is sufficient for flushing the previously rendered level that is used as a sampler source for rendering the next level. Without that flush, I get garbage in the smaller mipmap levels.
So, I know that this patch is not applicable, since it does not account for sufficient cs space for this additional flush. Also it is probably too croase in face of the finegrained bo flush logic. Also I cannot hear so much people screaming, so I guess the rv635 is about the only chip that suffers from this problem. But I failed to find that finegrained bo flush with the apropriate flush flags that makes mipmaps work again. May be this does ring some bell which flush is missing? If not, does somebody have any clue which chips do suffer from this prolem? Greetings Mathias
From 8890a8554c7fd04a870d54271aa7a9461baec6a6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Mathias=20Fr=C3=B6hlich?= <mathias.froehl...@web.de> Date: Sun, 24 Apr 2011 08:55:34 +0200 Subject: [PATCH] r600g: Emit a cache flush invalidate on a dest cache flush. This fixes a problem with building mipmaps on a rv635. This one seems to require this flush to have the previous mipmap level available for rendering the next level. --- src/gallium/winsys/r600/drm/r600_hw_context.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index e28ef1f..02e7383 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -1184,6 +1184,12 @@ void r600_context_flush_dest_caches(struct r600_context *ctx) r600_context_bo_flush(ctx, S_0085F0_DB_ACTION_ENA(1), 0, db); } + /* This flush is for mipmapping and probably other renderings that matches the following pattern: + If a draw references a sampler that is previously rendered to in the same command stream, + we probably need this flush. */ + ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 0, ctx->predicate_drawing); + ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0); + ctx->flags &= ~R600_CONTEXT_DST_CACHES_DIRTY; } -- 1.7.4.4
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