On Tue, 31 Aug 2010 19:35:09 -0600, Brian Paul <bri...@vmware.com> wrote: > On 08/31/2010 02:57 PM, Ian Romanick wrote: > > -----BEGIN PGP SIGNED MESSAGE----- > > Hash: SHA1
... > > So... what are our collective criteria for a 7.9 release to happen? > > Ian, I'm still getting up to speed on the new compiler, but it looks > like a full 4-element temp/const vector is allocated for each GLSL > float. The previous compiler would try to pack four floats into a > single vector whenever possible. This could dramatically reduced the > number of vector temps/consts needed. > > I'm worried that some apps that use large shaders will start failing. Actually, in my experience that packing of variables into vec4 storage before register allocation caused all temps allocated to basically be live for the lifetime of the program, and copy propagation/dead code elimination at the Mesa IR level to not occur. Then if a large program could even fit under the number of temps for register-constrained hw, it probably didn't have enough instructions for all the dead code. If we want to codegen from Mesa IR for our drivers without doing register allocation in the drivers (which itself is quite questionable if you really want programs to work on register-constrained, multiple-phase hw like 915), then the register allocator needs to grow awareness of how to move results around to pack things *after* copy propagation and dead code elimination.
pgpDQh8BMKStn.pgp
Description: PGP signature
_______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
