When pluging micro A cable for host mode, fake data pulse interrupt status are reported occasionally. Since Langwell only supports vbus pulsing SRP, we can safely ignore data pulse by clearing DPIE. [ 349.919780] langwell_otg 0000:00:02.3: langwell_otg_work: old state = a_wait_vrise [ 349.919814] initializing Intel MID USB OTG Host Controller [ 349.919948] langwell_otg 0000:00:02.3: EHCI Host Controller [ 349.920553] drivers/usb/core/inode.c: creating file '002'
[ 349.922629] langwell_otg 0000:00:02.3: otg_irq: data pulse int [ 349.922673] langwell_otg 0000:00:02.3: data pulse = 1 Signed-off-by: Jacob Pan <jacob.jun....@linux.intel.com> --- include/linux/usb/langwell_otg.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/linux/usb/langwell_otg.h b/include/linux/usb/langwell_otg.h index 51f17b1..bafec80 100644 --- a/include/linux/usb/langwell_otg.h +++ b/include/linux/usb/langwell_otg.h @@ -67,7 +67,7 @@ # define OTGSC_VC BIT(1) # define OTGSC_VD BIT(0) # define OTGSC_INTEN_MASK (0x7f << 24) -# define OTGSC_INT_MASK (0x5f << 24) +# define OTGSC_INT_MASK (0x1f << 24) # define OTGSC_INTSTS_MASK (0x7f << 16) #define CI_USBMODE 0xf8 # define USBMODE_CM (BIT(1) | BIT(0)) -- 1.7.1 _______________________________________________ MeeGo-kernel mailing list MeeGo-kernel@lists.meego.com http://lists.meego.com/listinfo/meego-kernel
