On Mon, May 15, 2023 at 04:17:11PM -0400, Olivier Dion wrote:
> If configured to use atomic builtins, implement SMP memory barriers in
> term of atomic builtins if the architecture does not implement its own
> version.
>
> Change-Id: Iddc4283606e0fce572e104d2d3f03b5c0d9926fb
> Co-authored-by: Mathieu Desnoyers <mathieu.desnoy...@efficios.com>
> Signed-off-by: Olivier Dion <od...@efficios.com>
> ---
> include/urcu/arch/generic.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/include/urcu/arch/generic.h b/include/urcu/arch/generic.h
> index be6e41e..e292c70 100644
> --- a/include/urcu/arch/generic.h
> +++ b/include/urcu/arch/generic.h
> @@ -43,6 +43,14 @@ extern "C" {
> * GCC builtins) as well as cmm_rmb and cmm_wmb (defaulting to cmm_mb).
> */
>
> +#ifdef CONFIG_RCU_USE_ATOMIC_BUILTINS
> +
> +# ifndef cmm_smp_mb
> +# define cmm_smp_mb() __atomic_thread_fence(__ATOMIC_SEQ_CST)
> +# endif
> +
> +#endif /* CONFIG_RCU_USE_ATOMIC_BUILTINS */
> +
> #ifndef cmm_mb
> #define cmm_mb() __sync_synchronize()
Just out of curiosity, why not also implement cmm_mb() in terms of
__atomic_thread_fence(__ATOMIC_SEQ_CST)? (Or is that a later patch?)
Thanx, Paul
> #endif
> --
> 2.39.2
>
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