On 2023-03-21 09:30, Ondřej Surý via lttng-dev wrote:
Replace the custom assembly code in include/urcu/uatomic/ with __atomic
builtins provided by C11-compatible compiler.

Signed-off-by: Ondřej Surý <ond...@sury.org>
---
  include/Makefile.am            |  16 -
  include/urcu/uatomic.h         |  84 +++--
  include/urcu/uatomic/aarch64.h |  41 ---
  include/urcu/uatomic/alpha.h   |  32 --
  include/urcu/uatomic/arm.h     |  57 ---
  include/urcu/uatomic/gcc.h     |  46 ---
  include/urcu/uatomic/generic.h | 613 -------------------------------
  include/urcu/uatomic/hppa.h    |  10 -
  include/urcu/uatomic/ia64.h    |  41 ---
  include/urcu/uatomic/m68k.h    |  44 ---
  include/urcu/uatomic/mips.h    |  32 --
  include/urcu/uatomic/nios2.h   |  32 --
  include/urcu/uatomic/ppc.h     | 237 ------------
  include/urcu/uatomic/riscv.h   |  44 ---
  include/urcu/uatomic/s390.h    | 170 ---------
  include/urcu/uatomic/sparc64.h |  81 -----
  include/urcu/uatomic/tile.h    |  41 ---
  include/urcu/uatomic/x86.h     | 646 ---------------------------------
  18 files changed, 53 insertions(+), 2214 deletions(-)
  delete mode 100644 include/urcu/uatomic/aarch64.h
  delete mode 100644 include/urcu/uatomic/alpha.h
  delete mode 100644 include/urcu/uatomic/arm.h
  delete mode 100644 include/urcu/uatomic/gcc.h
  delete mode 100644 include/urcu/uatomic/generic.h
  delete mode 100644 include/urcu/uatomic/hppa.h
  delete mode 100644 include/urcu/uatomic/ia64.h
  delete mode 100644 include/urcu/uatomic/m68k.h
  delete mode 100644 include/urcu/uatomic/mips.h
  delete mode 100644 include/urcu/uatomic/nios2.h
  delete mode 100644 include/urcu/uatomic/ppc.h
  delete mode 100644 include/urcu/uatomic/riscv.h
  delete mode 100644 include/urcu/uatomic/s390.h
  delete mode 100644 include/urcu/uatomic/sparc64.h
  delete mode 100644 include/urcu/uatomic/tile.h
  delete mode 100644 include/urcu/uatomic/x86.h

diff --git a/include/Makefile.am b/include/Makefile.am
index ba1fe60..53a28fd 100644
--- a/include/Makefile.am
+++ b/include/Makefile.am
@@ -59,24 +59,8 @@ nobase_include_HEADERS = \
        urcu/syscall-compat.h \
        urcu/system.h \
        urcu/tls-compat.h \
-       urcu/uatomic/aarch64.h \
-       urcu/uatomic/alpha.h \
        urcu/uatomic_arch.h \
-       urcu/uatomic/arm.h \
-       urcu/uatomic/gcc.h \
-       urcu/uatomic/generic.h \
        urcu/uatomic.h \
-       urcu/uatomic/hppa.h \
-       urcu/uatomic/ia64.h \
-       urcu/uatomic/m68k.h \
-       urcu/uatomic/mips.h \
-       urcu/uatomic/nios2.h \
-       urcu/uatomic/ppc.h \
-       urcu/uatomic/riscv.h \
-       urcu/uatomic/s390.h \
-       urcu/uatomic/sparc64.h \
-       urcu/uatomic/tile.h \
-       urcu/uatomic/x86.h \
        urcu/urcu-bp.h \
        urcu/urcu-futex.h \
        urcu/urcu.h \
diff --git a/include/urcu/uatomic.h b/include/urcu/uatomic.h
index 2fb5fd4..0327810 100644
--- a/include/urcu/uatomic.h
+++ b/include/urcu/uatomic.h
@@ -22,37 +22,59 @@
  #define _URCU_UATOMIC_H
#include <urcu/arch.h>
+#include <urcu/system.h>
-#if defined(URCU_ARCH_X86)
-#include <urcu/uatomic/x86.h>
-#elif defined(URCU_ARCH_PPC)
-#include <urcu/uatomic/ppc.h>
-#elif defined(URCU_ARCH_S390)
-#include <urcu/uatomic/s390.h>
-#elif defined(URCU_ARCH_SPARC64)
-#include <urcu/uatomic/sparc64.h>
-#elif defined(URCU_ARCH_ALPHA)
-#include <urcu/uatomic/alpha.h>
-#elif defined(URCU_ARCH_IA64)
-#include <urcu/uatomic/ia64.h>
-#elif defined(URCU_ARCH_ARM)
-#include <urcu/uatomic/arm.h>
-#elif defined(URCU_ARCH_AARCH64)
-#include <urcu/uatomic/aarch64.h>
-#elif defined(URCU_ARCH_MIPS)
-#include <urcu/uatomic/mips.h>
-#elif defined(URCU_ARCH_NIOS2)
-#include <urcu/uatomic/nios2.h>
-#elif defined(URCU_ARCH_TILE)
-#include <urcu/uatomic/tile.h>
-#elif defined(URCU_ARCH_HPPA)
-#include <urcu/uatomic/hppa.h>
-#elif defined(URCU_ARCH_M68K)
-#include <urcu/uatomic/m68k.h>
-#elif defined(URCU_ARCH_RISCV)
-#include <urcu/uatomic/riscv.h>
-#else
-#error "Cannot build: unrecognized architecture, see <urcu/arch.h>."
-#endif
+#define UATOMIC_HAS_ATOMIC_BYTE
+#define UATOMIC_HAS_ATOMIC_SHORT
+
+#define uatomic_set(addr, v) __atomic_store_n(addr, v, __ATOMIC_RELEASE)
+
+#define uatomic_read(addr) __atomic_load_n((addr), __ATOMIC_CONSUME)
+
+#define uatomic_xchg(addr, v) __atomic_exchange_n((addr), (v), 
__ATOMIC_SEQ_CST)
+
+#define uatomic_cmpxchg(addr, old, new) \
+       ({                                                                      
\
+               __typeof__(*(addr)) __old = old;                                
\
+               __atomic_compare_exchange_n(addr, &__old, new, 0,           \
+                                           __ATOMIC_SEQ_CST, 
__ATOMIC_SEQ_CST);                \
+               __old;                                                          
\
+       })
+
+#define uatomic_add_return(addr, v) \
+       __atomic_add_fetch((addr), (v), __ATOMIC_SEQ_CST)

The extra parentheses around "addr" and "v" here are not needed due to operator priority of comma ",". Likewise elsewhere in this patch.

Also, as mentioned earlier, please special-case the x86 implementation to include the __ATOMIC_SEQ_CST into atomic operations.

Thanks,

Mathieu

+
+#define uatomic_add(addr, v) \
+       (void)__atomic_add_fetch((addr), (v), __ATOMIC_RELAXED)
+
+#define uatomic_sub_return(addr, v) \
+       __atomic_sub_fetch((addr), (v), __ATOMIC_SEQ_CST)
+
+#define uatomic_sub(addr, v) \
+       (void)__atomic_sub_fetch((addr), (v), __ATOMIC_RELAXED)
+
+#define uatomic_and(addr, mask) \
+       (void)__atomic_and_fetch((addr), (mask), __ATOMIC_RELAXED)
+
+#define uatomic_or(addr, mask)                                         \
+       (void)__atomic_or_fetch((addr), (mask), __ATOMIC_RELAXED)
+
+#define uatomic_inc(addr) (void)__atomic_add_fetch((addr), 1, __ATOMIC_RELAXED)
+#define uatomic_dec(addr) (void)__atomic_sub_fetch((addr), 1, __ATOMIC_RELAXED)
+
+#define cmm_smp_mb__before_uatomic_and()       
__atomic_thread_fence(__ATOMIC_SEQ_CST)
+#define cmm_smp_mb__after_uatomic_and()                
__atomic_thread_fence(__ATOMIC_SEQ_CST)
+#define cmm_smp_mb__before_uatomic_or()                
__atomic_thread_fence(__ATOMIC_SEQ_CST)
+#define cmm_smp_mb__after_uatomic_or()         
__atomic_thread_fence(__ATOMIC_SEQ_CST)
+#define cmm_smp_mb__before_uatomic_add()       
__atomic_thread_fence(__ATOMIC_SEQ_CST)
+#define cmm_smp_mb__after_uatomic_add()                
__atomic_thread_fence(__ATOMIC_SEQ_CST)
+#define cmm_smp_mb__before_uatomic_sub()       cmm_smp_mb__before_uatomic_add()
+#define cmm_smp_mb__after_uatomic_sub()                
cmm_smp_mb__after_uatomic_add()
+#define cmm_smp_mb__before_uatomic_inc()       cmm_smp_mb__before_uatomic_add()
+#define cmm_smp_mb__after_uatomic_inc()                
cmm_smp_mb__after_uatomic_add()
+#define cmm_smp_mb__before_uatomic_dec()       cmm_smp_mb__before_uatomic_add()
+#define cmm_smp_mb__after_uatomic_dec()                
cmm_smp_mb__after_uatomic_add()
+
+#define cmm_smp_mb()                           cmm_mb()
#endif /* _URCU_UATOMIC_H */

[...]

Thanks,

Mathieu



--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com

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