Hi,

I'm just checking if you have received my message ? I want to understand what is
going on here before merging your contribution into liburcu.

Thanks,

Mathieu

----- On Jan 25, 2022, at 4:36 PM, Mathieu Desnoyers 
mathieu.desnoy...@efficios.com wrote:

> Hi,
> 
> I notice that the loongarch enablement patch defines:
> 
> #define UATOMIC_HAS_ATOMIC_BYTE
> #define UATOMIC_HAS_ATOMIC_SHORT
> 
> I tried looking into
> 
>  
> https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#atomic-memory-access-instructions
> 
> to figure out which atomic instructions or LL/SC would be used to target 1 
> and 2
> byte
> variables atomically, but could only find instructions for word and 
> double-word:
> 
> 2.2.7.1. AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[DB].{W/D}, AM{MAX/MIN}[_DB].{WU/DU}
> 2.2.7.2. LL.{W/D}, SC.{W/D}
> 
> What am I missing here ?
> 
> Thanks,
> 
> Mathieu
> 
> ----- On Jan 24, 2022, at 6:59 AM, lttng-dev lttng-dev@lists.lttng.org wrote:
> 
>> Unfortunately, the qemu approach does not help much in testing that the
>> liburcu implementation works correctly on a given architecture's
>> specific memory model.
>> 
>> liburcu relies heavily on memory ordering, and liburcu-cds relies on
>> both memory ordering and atomic operations and the memory ordering
>> guarantees associated with them.
>> 
>> So if there is any way we could get our hands on real hardware, it
>> would be very much relevant for liburcu testing.
>> 
>> Thanks,
>> 
>> Mathieu
>> 
>> ----- On Jan 24, 2022, at 3:02 AM, 张文龙 zhangwenl...@loongson.cn wrote:
>> 
>>> I'm glad the new architecture can be accepted,At present, our machines are 
>>> in
>>> short supply.I need to go through a very complicated process to provide
>>> machines, Can qemu emulator work?
>>> 
>>> 
>>> > -----原始邮件-----
>>> &gt; 发件人: "Mathieu Desnoyers" <mathieu.desnoy...@efficios.com>
>>> &gt; 发送时间: 2022-01-20 23:59:52 (星期四)
>>> &gt; 收件人: "张文龙" <zhangwenl...@loongson.cn>
>>> &gt; 抄送: lttng-dev <lttng-dev@lists.lttng.org>
>>> &gt; 主题: Re: [lttng-dev] Add support for the LOONGARCH architecture
>>> &gt;
>>> &gt; ----- On Jan 19, 2022, at 11:03 PM, lttng-dev lttng-dev@lists.lttng.org
>>> wrote:
>>> &gt;
>>> &gt; &gt; Hello, I'm excited to contribute to userspace-rcu, I added 
>>> loongarch
>>> &gt; &gt; architecture for userspace-rcu( The patch file is
>>> &gt; &gt; 0001-Add-support-for-the-LOONGARCH-architecture.patch )
>>> &gt;
>>> &gt; &gt; I have compiled and verified locally (the build log is 
>>> build_log.txt
>>> ),and then
>>> &gt; &gt; i runed make check( the make check log is make_check_log.txt ), 
>>> make
>>> &gt; &gt; regtest(the make regtest log is make_regtest_log.txt ) , make
>>> short_bench (the
>>> &gt; &gt; make short_bench log is make_short_bench_log.txt ),make 
>>> long_bench(the
>>> make
>>> &gt; &gt; long_bench log is make_long_bench_log.txt )
>>> &gt;
>>> &gt; This is great, thanks !
>>> &gt;
>>> &gt; By the way, is there any way EfficiOS could add two loongarch test 
>>> boards
>>> into
>>> &gt; our test rack for automated CI testing ? See https://ci.lttng.org
>>> &gt;
>>> &gt; We typically deploy at least two boards for each given architecture for
>>> redundancy
>>> &gt; and availability for both CI and development use.
>>> &gt;
>>> &gt; This would help ensuring we catch liburcu regressions in the loongarch
>>> architecture
>>> &gt; in the future.
>>> &gt;
>>> &gt; Thanks,
>>> &gt;
>>> &gt; Mathieu
>>> &gt;
>>> &gt;
>>> &gt; &gt; 本邮件及其附件含有龙芯中科的商业秘密信息,仅限于发送给上面地址中列出的个人或群组。禁止任何其他人以任何形式使用(包括但不限于全部或部
>>> &gt; &gt; 分地泄露、复制或散发)本邮件及其附件中的信息。如果您错收本邮件,请您立即电话或邮件通知发件人并删除本邮件。
>>> &gt; &gt; This email and its attachments contain confidential information 
>>> from
>>> Loongson
>>> &gt; &gt; Technology , which is intended only for the person or entity whose
>>> address is
>>> &gt; &gt; listed above. Any use of the information contained herein in any 
>>> way
>>> &gt; &gt; (including, but not limited to, total or partial disclosure,
>>> reproduction or
>>> &gt; &gt; dissemination) by persons other than the intended recipient(s) is
>>> prohibited.
>>> &gt; &gt; If you receive this email in error, please notify the sender by 
>>> phone
>>> or email
>>> &gt; &gt; immediately and delete it.
>>> &gt; &gt; _______________________________________________
>>> &gt; &gt; lttng-dev mailing list
>>> &gt; &gt; lttng-dev@lists.lttng.org
>>> &gt; &gt; https://lists.lttng.org/cgi-bin/mailman/listinfo/lttng-dev
>>> &gt; --
>>> &gt; Mathieu Desnoyers
>>> &gt; EfficiOS Inc.
>>> &gt; http://www.efficios.com
>>> </lttng-dev@lists.lttng.org></zhangwenl...@loongson.cn></mathieu.desnoy...@efficios.com>
>>> 
>>> 本邮件及其附件含有龙芯中科的商业秘密信息,仅限于发送给上面地址中列出的个人或群组。禁止任何其他人以任何形式使用(包括但不限于全部或部分地泄露、复制或散发)本邮件及其附件中的信息。如果您错收本邮件,请您立即电话或邮件通知发件人并删除本邮件。
>>> This email and its attachments contain confidential information from 
>>> Loongson
>>> Technology , which is intended only for the person or entity whose address 
>>> is
>>> listed above. Any use of the information contained herein in any way
>>> (including, but not limited to, total or partial disclosure, reproduction or
>>> dissemination) by persons other than the intended recipient(s) is 
>>> prohibited.
>>> If you receive this email in error, please notify the sender by phone or 
>>> email
>>> immediately and delete it.
>> 
>> --
>> Mathieu Desnoyers
>> EfficiOS Inc.
>> http://www.efficios.com
>> _______________________________________________
>> lttng-dev mailing list
>> lttng-dev@lists.lttng.org
>> https://lists.lttng.org/cgi-bin/mailman/listinfo/lttng-dev
> 
> --
> Mathieu Desnoyers
> EfficiOS Inc.
> http://www.efficios.com

-- 
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
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