[llvm-commits] [llvm] r47196 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

[Dan Gohman]

Author: djg
Date: Fri Feb 15 18:25:40 2008
New Revision: 47196

URL: http://llvm.org/viewvc/llvm-project?rev=47196&view=rev
Log:
Revert 47177, which was incorrect.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=47196&r1=47195&r2=47196&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Fri Feb 15 
18:25:40 2008
@@ -431,7 +431,7 @@
     SUnit *NewSU = NewSUnit(N);
     SUnitMap[N].push_back(NewSU);
     const TargetInstrDesc &TID = TII->get(N->getTargetOpcode());
-    for (unsigned i = TID.getNumDefs(); i != TID.getNumOperands(); ++i) {
+    for (unsigned i = 0; i != TID.getNumOperands(); ++i) {
       if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1) {
         NewSU->isTwoAddress = true;
         break;


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