Author: johannes Date: Thu Feb 14 17:35:16 2008 New Revision: 47143 URL: http://llvm.org/viewvc/llvm-project?rev=47143&view=rev Log: Rewrite tblgen handling of subtarget features so it follows the order of the enum, not alphabetical. The motivation is to make -mattr=+ssse3,+sse41 select SSE41 as it ought to. Added "ignored" enum values of 0 to PPC and SPU to avoid compiler warnings.
Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h?rev=47143&r1=47142&r2=47143&view=diff ============================================================================== --- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h (original) +++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h Thu Feb 14 17:35:16 2008 @@ -26,6 +26,7 @@ namespace SPU { enum { + PROC_NONE, DEFAULT_PROC }; } Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47143&r1=47142&r2=47143&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Feb 14 17:35:16 2008 @@ -849,6 +849,7 @@ bool DarwinAsmPrinter::doInitialization(Module &M) { static const char *CPUDirectives[] = { + "", "ppc", "ppc601", "ppc602", Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47143&r1=47142&r2=47143&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original) +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Thu Feb 14 17:35:16 2008 @@ -60,6 +60,7 @@ const std::string &FS, bool is64Bit) : TM(tm) , StackAlignment(16) + , DarwinDirective(PPC::DIR_NONE) , IsGigaProcessor(false) , Has64BitSupport(false) , Use64BitRegs(false) Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=47143&r1=47142&r2=47143&view=diff ============================================================================== --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original) +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Thu Feb 14 17:35:16 2008 @@ -27,6 +27,7 @@ namespace PPC { // -m directive values. enum { + DIR_NONE, DIR_32, DIR_601, DIR_602, Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=47143&r1=47142&r2=47143&view=diff ============================================================================== --- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original) +++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Thu Feb 14 17:35:16 2008 @@ -482,8 +482,12 @@ const std::string &Value = R->getValueAsString("Value"); const std::string &Attribute = R->getValueAsString("Attribute"); - OS << " if ((Bits & " << Instance << ") != 0) " - << Attribute << " = " << Value << ";\n"; + if (Value=="true" || Value=="false") + OS << " if ((Bits & " << Instance << ") != 0) " + << Attribute << " = " << Value << ";\n"; + else + OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute << + " < " << Value << ") " << Attribute << " = " << Value << ";\n"; } if (HasItineraries) { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits