Author: sampo
Date: Thu Feb 14 01:25:46 2008
New Revision: 47115
URL: http://llvm.org/viewvc/llvm-project?rev=47115&view=rev
Log:
Move some useful operands up into the all-targets .td
Modified:
llvm/trunk/lib/Target/CellSPU/SPUOperands.td
llvm/trunk/lib/Target/Target.td
Modified: llvm/trunk/lib/Target/CellSPU/SPUOperands.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUOperands.td?rev=47115&r1=47114&r2=47115&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUOperands.td (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUOperands.td Thu Feb 14 01:25:46 2008
@@ -538,9 +538,6 @@
let PrintMethod = "printROTNeg7Imm";
}
-// Floating point immediate operands
-def f32imm : Operand<f32>;
-
def target : Operand<OtherVT> {
let PrintMethod = "printBranchOperand";
}
Modified: llvm/trunk/lib/Target/Target.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=47115&r1=47114&r2=47115&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Target.td (original)
+++ llvm/trunk/lib/Target/Target.td Thu Feb 14 01:25:46 2008
@@ -277,6 +277,9 @@
def i32imm : Operand<i32>;
def i64imm : Operand<i64>;
+def f32imm : Operand<f32>;
+def f64imm : Operand<f64>;
+
/// zero_reg definition - Special node to stand for the zero register.
///
def zero_reg;
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