Author: sampo
Date: Fri Feb 8 19:37:05 2008
New Revision: 46901
URL: http://llvm.org/viewvc/llvm-project?rev=46901&view=rev
Log:
Tablegen support for insert & extract element matching
Modified:
llvm/trunk/lib/Target/TargetSelectionDAG.td
llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h
Modified: llvm/trunk/lib/Target/TargetSelectionDAG.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetSelectionDAG.td?rev=46901&r1=46900&r2=46901&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetSelectionDAG.td (original)
+++ llvm/trunk/lib/Target/TargetSelectionDAG.td Fri Feb 8 19:37:05 2008
@@ -60,6 +60,13 @@
int OtherOpNum = OtherOp;
}
+/// SDTCisEltOfVec - This indicates that ThisOp is a scalar type of the same
+/// type as the element type of OtherOp, which is a vector type.
+class SDTCisEltOfVec<int ThisOp, int OtherOp>
+ : SDTypeConstraint<ThisOp> {
+ int OtherOpNum = OtherOp;
+}
+
//===----------------------------------------------------------------------===//
// Selection DAG Type Profile definitions.
//
@@ -171,6 +178,12 @@
def SDTVecShuffle : SDTypeProfile<1, 3, [
SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
]>;
+def SDTVecExtract : SDTypeProfile<1, 2, [ // vector extract
+ SDTCisEltOfVec<0, 1>, SDTCisPtrTy<2>
+]>;
+def SDTVecInsert : SDTypeProfile<1, 2, [ // vector insert
+ SDTCisEltOfVec<1, 0>, SDTCisPtrTy<2>
+]>;
class SDCallSeqStart<list<SDTypeConstraint> constraints> :
SDTypeProfile<0, 1, constraints>;
@@ -283,6 +296,9 @@
def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>;
def bitconvert : SDNode<"ISD::BIT_CONVERT", SDTUnaryOp>;
+def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>;
+def insertelt : SDNode<"ISD::INSERT_VECTOR_ELT", SDTVecInsert>;
+
def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>;
def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=46901&r1=46900&r2=46901&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Fri Feb 8 19:37:05 2008
@@ -112,6 +112,10 @@
ConstraintType = SDTCisIntVectorOfSameSize;
x.SDTCisIntVectorOfSameSize_Info.OtherOperandNum =
R->getValueAsInt("OtherOpNum");
+ } else if (R->isSubClassOf("SDTCisEltOfVec")) {
+ ConstraintType = SDTCisEltOfVec;
+ x.SDTCisEltOfVec_Info.OtherOperandNum =
+ R->getValueAsInt("OtherOpNum");
} else {
cerr << "Unrecognized SDTypeConstraint '" << R->getName() << "'!\n";
exit(1);
@@ -288,6 +292,19 @@
}
return false;
}
+ case SDTCisEltOfVec: {
+ TreePatternNode *OtherOperand =
+ getOperandNum(x.SDTCisIntVectorOfSameSize_Info.OtherOperandNum,
+ N, NumResults);
+ if (OtherOperand->hasTypeSet()) {
+ if (!MVT::isVector(OtherOperand->getTypeNum(0)))
+ TP.error(N->getOperator()->getName() + " VT operand must be a
vector!");
+ MVT::ValueType IVT = OtherOperand->getTypeNum(0);
+ IVT = MVT::getVectorElementType(IVT);
+ return NodeToApply->UpdateNodeType(IVT, TP);
+ }
+ return false;
+ }
}
return false;
}
Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h?rev=46901&r1=46900&r2=46901&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.h Fri Feb 8 19:37:05 2008
@@ -56,7 +56,8 @@
unsigned OperandNo; // The operand # this constraint applies to.
enum {
SDTCisVT, SDTCisPtrTy, SDTCisInt, SDTCisFP, SDTCisSameAs,
- SDTCisVTSmallerThanOp, SDTCisOpSmallerThanOp, SDTCisIntVectorOfSameSize
+ SDTCisVTSmallerThanOp, SDTCisOpSmallerThanOp, SDTCisIntVectorOfSameSize,
+ SDTCisEltOfVec
} ConstraintType;
union { // The discriminated union.
@@ -75,6 +76,9 @@
struct {
unsigned OtherOperandNum;
} SDTCisIntVectorOfSameSize_Info;
+ struct {
+ unsigned OtherOperandNum;
+ } SDTCisEltOfVec_Info;
} x;
/// ApplyTypeConstraint - Given a node in a pattern, apply this type
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