Author: johannes
Date: Fri Feb 8 13:48:20 2008
New Revision: 46890
URL: http://llvm.org/viewvc/llvm-project?rev=46890&view=rev
Log:
64-bit (MMX) vectors do not need restrictive alignment.
128-bit vectors need it only when SSE is on.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=46890&r1=46889&r2=46890&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Feb 8 13:48:20 2008
@@ -704,9 +704,6 @@
if (const VectorType *VTy = dyn_cast<VectorType>(Ty)) {
if (VTy->getBitWidth() == 128)
MaxAlign = 16;
- else if (VTy->getBitWidth() == 64)
- if (MaxAlign < 8)
- MaxAlign = 8;
} else if (const ArrayType *ATy = dyn_cast<ArrayType>(Ty)) {
unsigned EltAlign = 0;
getMaxByValAlign(ATy->getElementType(), EltAlign);
@@ -727,13 +724,14 @@
/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
/// function arguments in the caller parameter area. For X86, aggregates
-/// that contains are placed at 16-byte boundaries while the rest are at
-/// 4-byte boundaries.
+/// that contain SSE vectors are placed at 16-byte boundaries while the rest
+/// are at 4-byte boundaries.
unsigned X86TargetLowering::getByValTypeAlignment(const Type *Ty) const {
if (Subtarget->is64Bit())
return getTargetData()->getABITypeAlignment(Ty);
unsigned Align = 4;
- getMaxByValAlign(Ty, Align);
+ if (Subtarget->hasSSE1())
+ getMaxByValAlign(Ty, Align);
return Align;
}
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