Author: lattner
Date: Fri Jan 25 11:24:52 2008
New Revision: 46355
URL: http://llvm.org/viewvc/llvm-project?rev=46355&view=rev
Log:
fix long lines.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=46355&r1=46354&r2=46355&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Jan 25
11:24:52 2008
@@ -57,7 +57,7 @@
cl::desc("Pop up a window to show sched dags as they are
processed"));
static cl::opt<bool>
ViewSUnitDAGs("view-sunit-dags", cl::Hidden,
- cl::desc("Pop up a window to show SUnit dags after they are
processed"));
+ cl::desc("Pop up a window to show SUnit dags after they are processed"));
#else
static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0, ViewSUnitDAGs = 0;
#endif
@@ -79,7 +79,8 @@
RegisterPassParser<RegisterScheduler> >
ISHeuristic("pre-RA-sched",
cl::init(&createDefaultScheduler),
- cl::desc("Instruction schedulers available (before register
allocation):"));
+ cl::desc("Instruction schedulers available (before register"
+ " allocation):"));
static RegisterScheduler
defaultListDAGScheduler("default", " Best scheduler for the target",
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