[llvm-commits] [llvm] r46344 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/copysign-zero.ll

[Chris Lattner]

Author: lattner
Date: Thu Jan 24 23:46:26 2008
New Revision: 46344

URL: http://llvm.org/viewvc/llvm-project?rev=46344&view=rev
Log:
Add target-specific dag combines for FAND(x,0) and FOR(x,0).  This allows
us to compile:

double test(double X) {
  return copysign(0.0, X);
}

into:

_test:
        andpd   LCPI1_0(%rip), %xmm0
        ret

instead of:
_test:
        pxor    %xmm1, %xmm1
        andpd   LCPI1_0(%rip), %xmm1
        movapd  %xmm0, %xmm2
        andpd   LCPI1_1(%rip), %xmm2
        movapd  %xmm1, %xmm0
        orpd    %xmm2, %xmm0
        ret


Added:
    llvm/trunk/test/CodeGen/X86/copysign-zero.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=46344&r1=46343&r2=46344&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jan 24 23:46:26 2008
@@ -5627,16 +5627,42 @@
   return SDOperand();
 }
 
+/// PerformFORCombine - Do target-specific dag combines on X86ISD::FOR nodes.
+static SDOperand PerformFORCombine(SDNode *N, SelectionDAG &DAG) {
+  // FOR(0.0, x) -> x
+  // FOR(x, 0.0) -> x
+  if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(N->getOperand(0)))
+    if (C->getValueAPF().isPosZero())
+      return N->getOperand(1);
+  if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(N->getOperand(1)))
+    if (C->getValueAPF().isPosZero())
+      return N->getOperand(0);
+  return SDOperand();
+}
+
+/// PerformFANDCombine - Do target-specific dag combines on X86ISD::FAND nodes.
+static SDOperand PerformFANDCombine(SDNode *N, SelectionDAG &DAG) {
+  // FAND(0.0, x) -> 0.0
+  // FAND(x, 0.0) -> 0.0
+  if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(N->getOperand(0)))
+    if (C->getValueAPF().isPosZero())
+      return N->getOperand(0);
+  if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(N->getOperand(1)))
+    if (C->getValueAPF().isPosZero())
+      return N->getOperand(1);
+  return SDOperand();
+}
+
 
 SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N,
                                                DAGCombinerInfo &DCI) const {
   SelectionDAG &DAG = DCI.DAG;
   switch (N->getOpcode()) {
   default: break;
-  case ISD::VECTOR_SHUFFLE:
-    return PerformShuffleCombine(N, DAG, Subtarget);
-  case ISD::SELECT:
-    return PerformSELECTCombine(N, DAG, Subtarget);
+  case ISD::VECTOR_SHUFFLE: return PerformShuffleCombine(N, DAG, Subtarget);
+  case ISD::SELECT:         return PerformSELECTCombine(N, DAG, Subtarget);
+  case X86ISD::FOR:         return PerformFORCombine(N, DAG);
+  case X86ISD::FAND:        return PerformFANDCombine(N, DAG);
   }
 
   return SDOperand();

Added: llvm/trunk/test/CodeGen/X86/copysign-zero.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/copysign-zero.ll?rev=46344&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/copysign-zero.ll (added)
+++ llvm/trunk/test/CodeGen/X86/copysign-zero.ll Thu Jan 24 23:46:26 2008
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc | not grep orpd
+; RUN: llvm-as < %s | llc | grep andpd | count 1
+
+target datalayout = 
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+define double @test(double %X) nounwind  {
+entry:
+       %tmp2 = tail call double @copysign( double 0.000000e+00, double %X ) 
nounwind readnone          ; <double> [#uses=1]
+       ret double %tmp2
+}
+
+declare double @copysign(double, double) nounwind readnone 
+


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