Author: nicholas Date: Mon Jan 21 23:08:48 2008 New Revision: 46244 URL: http://llvm.org/viewvc/llvm-project?rev=46244&view=rev Log: Multiply can be evaluated in a different type, so long as the target type has a smaller bitwidth.
Added: llvm/trunk/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=46244&r1=46243&r2=46244&view=diff ============================================================================== --- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original) +++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Jan 21 23:08:48 2008 @@ -6512,6 +6512,15 @@ CanEvaluateInDifferentType(I->getOperand(1), Ty, CastOpc, NumCastsRemoved); + case Instruction::Mul: + break; + // A multiply can be truncated by truncating its operands. + return Ty->getBitWidth() < OrigTy->getBitWidth() && + CanEvaluateInDifferentType(I->getOperand(0), Ty, CastOpc, + NumCastsRemoved) && + CanEvaluateInDifferentType(I->getOperand(1), Ty, CastOpc, + NumCastsRemoved); + case Instruction::Shl: // If we are truncating the result of this SHL, and if it's a shift of a // constant amount, we can always perform a SHL in a smaller type. @@ -6571,6 +6580,7 @@ switch (I->getOpcode()) { case Instruction::Add: case Instruction::Sub: + case Instruction::Mul: case Instruction::And: case Instruction::Or: case Instruction::Xor: Added: llvm/trunk/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll?rev=46244&view=auto ============================================================================== --- llvm/trunk/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll (added) +++ llvm/trunk/test/Transforms/InstCombine/2008-01-21-MulTrunc.ll Mon Jan 21 23:08:48 2008 @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | notcast + +define i16 @test1(i16 %a) { + %tmp = zext i16 %a to i32 ; <i32> [#uses=2] + %tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1] + %tmp5 = mul i32 %tmp, 5 ; <i32> [#uses=1] + %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1] + %tmp.upgrd.3 = trunc i32 %tmp.upgrd.32 to i16 ; <i16> [#uses=1] + ret i16 %tmp.upgrd.3 +} + _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits