Author: lattner
Date: Fri Jan 18 10:54:56 2008
New Revision: 46161
URL: http://llvm.org/viewvc/llvm-project?rev=46161&view=rev
Log:
Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:
_test:
fctiwz f0, f1
stfiwx f0, 0, r4
blr
instead of:
_test:
fctiwz f0, f1
stfd f0, -8(r1)
nop
nop
lwz r2, -4(r1)
stb r2, 0(r4)
blr
The former is not correct (stores 4 bytes, not 1).
Added:
llvm/trunk/test/CodeGen/PowerPC/stfiwx-2.ll
Modified:
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=46161&r1=46160&r2=46161&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Jan 18 10:54:56 2008
@@ -3184,6 +3184,7 @@
case ISD::STORE:
// Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)).
if (TM.getSubtarget<PPCSubtarget>().hasSTFIWX() &&
+ !cast<StoreSDNode>(N)->isTruncatingStore() &&
N->getOperand(1).getOpcode() == ISD::FP_TO_SINT &&
N->getOperand(1).getValueType() == MVT::i32 &&
N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) {
Added: llvm/trunk/test/CodeGen/PowerPC/stfiwx-2.ll
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/stfiwx-2.ll?rev=46161&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stfiwx-2.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/stfiwx-2.ll Fri Jan 18 10:54:56 2008
@@ -0,0 +1,11 @@
+; This cannot be a stfiwx
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep stb
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep stfiwx
+
+define void @test(float %F, i8* %P) {
+ %I = fptosi float %F to i32
+ %X = trunc i32 %I to i8
+ store i8 %X, i8* %P
+ ret void
+}
+
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