[llvm-commits] [llvm] r46052 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Chris Lattner]

Author: lattner
Date: Tue Jan 15 23:52:18 2008
New Revision: 46052

URL: http://llvm.org/viewvc/llvm-project?rev=46052&view=rev
Log:
various whitespace cleanups, no functionality change.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=46052&r1=46051&r2=46052&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jan 15 23:52:18 2008
@@ -683,16 +683,16 @@
 /// GetPossiblePreceedingTailCall - Get preceeding X86ISD::TAILCALL node if it
 /// exists skip possible ISD:TokenFactor.
 static SDOperand GetPossiblePreceedingTailCall(SDOperand Chain) {
-  if (Chain.getOpcode()==X86ISD::TAILCALL) {
+  if (Chain.getOpcode() == X86ISD::TAILCALL) {
     return Chain;
-  } else if (Chain.getOpcode()==ISD::TokenFactor) {
+  } else if (Chain.getOpcode() == ISD::TokenFactor) {
     if (Chain.getNumOperands() &&
-        Chain.getOperand(0).getOpcode()==X86ISD::TAILCALL)
+        Chain.getOperand(0).getOpcode() == X86ISD::TAILCALL)
       return Chain.getOperand(0);
   }
   return Chain;
 }
-    
+
 /// LowerRET - Lower an ISD::RET node.
 SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
   assert((Op.getNumOperands() & 1) == 1 && "ISD::RET should have odd # args");
@@ -718,14 +718,14 @@
     SDOperand TailCall = Chain;
     SDOperand TargetAddress = TailCall.getOperand(1);
     SDOperand StackAdjustment = TailCall.getOperand(2);
-    assert ( ((TargetAddress.getOpcode() == ISD::Register &&
+    assert(((TargetAddress.getOpcode() == ISD::Register &&
                (cast<RegisterSDNode>(TargetAddress)->getReg() == X86::ECX ||
                 cast<RegisterSDNode>(TargetAddress)->getReg() == X86::R9)) ||
               TargetAddress.getOpcode() == ISD::TargetExternalSymbol ||
               TargetAddress.getOpcode() == ISD::TargetGlobalAddress) && 
              "Expecting an global address, external symbol, or register");
-    assert( StackAdjustment.getOpcode() == ISD::Constant &&
-            "Expecting a const value");
+    assert(StackAdjustment.getOpcode() == ISD::Constant &&
+           "Expecting a const value");
 
     SmallVector<SDOperand,8> Operands;
     Operands.push_back(Chain.getOperand(0));


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