Author: evancheng Date: Fri Jan 11 01:37:44 2008 New Revision: 45861 URL: http://llvm.org/viewvc/llvm-project?rev=45861&view=rev Log: Rename Int_CVTSI642SSr* to Int_CVTSI2SS64r* for naming consistency and remove unused instructions.
Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=45861&r1=45860&r2=45861&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original) +++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Fri Jan 11 01:37:44 2008 @@ -1028,6 +1028,7 @@ def CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs FR64:$dst), (ins i64mem:$src), "cvtsi2sd{q}\t{$src, $dst|$dst, $src}", [(set FR64:$dst, (sint_to_fp (loadi64 addr:$src)))]>; + let isTwoAddress = 1 in { def Int_CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), @@ -1050,17 +1051,21 @@ def CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, (outs FR32:$dst), (ins i64mem:$src), "cvtsi2ss{q}\t{$src, $dst|$dst, $src}", [(set FR32:$dst, (sint_to_fp (loadi64 addr:$src)))]>; -let isTwoAddress = 1, neverHasSideEffects = 1 in { -def Int_CVTSI2SS64rr: RSSI<0x2A, MRMSrcReg, - (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", - []>; // TODO: add intrinsic -let mayLoad = 1 in -def Int_CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, - (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", - []>; // TODO: add intrinsic -} // isTwoAddress + +let isTwoAddress = 1 in { + def Int_CVTSI2SS64rr : RSSI<0x2A, MRMSrcReg, + (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", + [(set VR128:$dst, + (int_x86_sse_cvtsi642ss VR128:$src1, + GR64:$src2))]>; + def Int_CVTSI2SS64rm : RSSI<0x2A, MRMSrcMem, + (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), + "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", + [(set VR128:$dst, + (int_x86_sse_cvtsi642ss VR128:$src1, + (loadi64 addr:$src2)))]>; +} // f32 -> signed i64 def Int_CVTSS2SI64rr: RSSI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), @@ -1086,21 +1091,6 @@ [(set GR64:$dst, (int_x86_sse_cvttss2si64 (load addr:$src)))]>; -let isTwoAddress = 1 in { - def Int_CVTSI642SSrr : RSSI<0x2A, MRMSrcReg, - (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), - "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, - (int_x86_sse_cvtsi642ss VR128:$src1, - GR64:$src2))]>; - def Int_CVTSI642SSrm : RSSI<0x2A, MRMSrcMem, - (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), - "cvtsi2ss{q}\t{$src2, $dst|$dst, $src2}", - [(set VR128:$dst, - (int_x86_sse_cvtsi642ss VR128:$src1, - (loadi64 addr:$src2)))]>; -} - //===----------------------------------------------------------------------===// // Alias Instructions //===----------------------------------------------------------------------===// _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits