Author: sampo
Date: Sat Jan 5 14:51:30 2008
New Revision: 45631
URL: http://llvm.org/viewvc/llvm-project?rev=45631&view=rev
Log:
Remove an incorrect optimization that is performed correctly by
the target independent legalizer.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=45631&r1=45630&r2=45631&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Jan 5 14:51:30 2008
@@ -3608,17 +3608,7 @@
N2 =
DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(),getPointerTy());
return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2);
}
-
- N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, N1);
- unsigned Idx = cast<ConstantSDNode>(N2)->getValue();
- MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4);
- MVT::ValueType MaskEVT = MVT::getVectorElementType(MaskVT);
- SmallVector<SDOperand, 4> MaskVec;
- for (unsigned i = 0; i < 4; ++i)
- MaskVec.push_back(DAG.getConstant((i == Idx) ? i+4 : i, MaskEVT));
- return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, N0, N1,
- DAG.getNode(ISD::BUILD_VECTOR, MaskVT,
- &MaskVec[0], MaskVec.size()));
+ return SDOperand();
}
SDOperand
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
