Author: lattner Date: Sat Dec 29 18:12:25 2007 New Revision: 45428 URL: http://llvm.org/viewvc/llvm-project?rev=45428&view=rev Log: simplify some code by factoring operand construction better.
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h llvm/trunk/lib/CodeGen/MachineInstr.cpp Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=45428&r1=45427&r2=45428&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original) +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Sat Dec 29 18:12:25 2007 @@ -98,10 +98,6 @@ MachineOperand Op; Op.opType = MachineOperand::MO_Immediate; Op.contents.immedVal = Val; - Op.IsDef = false; - Op.IsImp = false; - Op.IsKill = false; - Op.IsDead = false; Op.auxInfo.offset = 0; return Op; } @@ -110,14 +106,24 @@ MachineOperand Op; Op.opType = MachineOperand::MO_FrameIndex; Op.contents.immedVal = Idx; - Op.IsDef = false; - Op.IsImp = false; - Op.IsKill = false; - Op.IsDead = false; Op.auxInfo.offset = 0; return Op; } - + + static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false, + bool isKill = false, bool isDead = false, + unsigned SubReg = 0) { + MachineOperand Op; + Op.opType = MachineOperand::MO_Register; + Op.IsDef = isDef; + Op.IsImp = isImp; + Op.IsKill = isKill; + Op.IsDead = isDead; + Op.contents.RegNo = Reg; + Op.auxInfo.subReg = SubReg; + return Op; + } + const MachineOperand &operator=(const MachineOperand &MO) { contents = MO.contents; IsDef = MO.IsDef; @@ -341,7 +347,6 @@ void operator=(const MachineInstr&); // DO NOT IMPLEMENT // Intrusive list support - // friend struct ilist_traits<MachineInstr>; public: @@ -350,7 +355,7 @@ MachineInstr(); /// MachineInstr ctor - This constructor create a MachineInstr and add the - /// implicit operands. It reserves space for number of operands specified by + /// implicit operands. It reserves space for number of operands specified by /// TargetInstrDescriptor. explicit MachineInstr(const TargetInstrDescriptor &TID, bool NoImp = false); @@ -465,24 +470,17 @@ void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false, bool IsKill = false, bool IsDead = false, unsigned SubReg = 0) { - MachineOperand &Op = AddNewOperand(IsImp); - Op.opType = MachineOperand::MO_Register; - Op.IsDef = IsDef; - Op.IsImp = IsImp; - Op.IsKill = IsKill; - Op.IsDead = IsDead; - Op.contents.RegNo = Reg; - Op.auxInfo.subReg = (unsigned char)SubReg; + // FIXME: Make the AddNewOperand api sane. + AddNewOperand(IsImp) = MachineOperand::CreateReg(Reg, IsDef, IsImp, IsKill, + IsDead, SubReg); } /// addImmOperand - Add a zero extended constant argument to the /// machine instruction. /// void addImmOperand(int64_t Val) { - MachineOperand &Op = AddNewOperand(); - Op.opType = MachineOperand::MO_Immediate; - Op.contents.immedVal = Val; - Op.auxInfo.offset = 0; + // FIXME: Make the AddNewOperand api sane. + AddNewOperand() = MachineOperand::CreateImm(Val); } void addMachineBasicBlockOperand(MachineBasicBlock *MBB) { @@ -495,10 +493,8 @@ /// addFrameIndexOperand - Add an abstract frame index to the instruction /// void addFrameIndexOperand(unsigned Idx) { - MachineOperand &Op = AddNewOperand(); - Op.opType = MachineOperand::MO_FrameIndex; - Op.contents.immedVal = Idx; - Op.auxInfo.offset = 0; + // FIXME: Make the AddNewOperand api sane. + AddNewOperand() = MachineOperand::CreateFrameIndex(Idx); } /// addConstantPoolndexOperand - Add a constant pool object index to the Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=45428&r1=45427&r2=45428&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Sat Dec 29 18:12:25 2007 @@ -31,29 +31,11 @@ void MachineInstr::addImplicitDefUseOperands() { if (TID->ImplicitDefs) - for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) { - MachineOperand Op; - Op.opType = MachineOperand::MO_Register; - Op.IsDef = true; - Op.IsImp = true; - Op.IsKill = false; - Op.IsDead = false; - Op.contents.RegNo = *ImpDefs; - Op.auxInfo.subReg = 0; - Operands.push_back(Op); - } + for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) + addRegOperand(*ImpDefs, true, true); if (TID->ImplicitUses) - for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) { - MachineOperand Op; - Op.opType = MachineOperand::MO_Register; - Op.IsDef = false; - Op.IsImp = true; - Op.IsKill = false; - Op.IsDead = false; - Op.contents.RegNo = *ImpUses; - Op.auxInfo.subReg = 0; - Operands.push_back(Op); - } + for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) + addRegOperand(*ImpUses, false, true); } /// MachineInstr ctor - This constructor create a MachineInstr and add the _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits