Author: lattner
Date: Sun Dec 16 14:12:41 2007
New Revision: 45074
URL: http://llvm.org/viewvc/llvm-project?rev=45074&view=rev
Log:
Fix the JIT encoding of cmp*ss, which aborts with this assertion currently:
X86CodeEmitter.cpp:378: failed assertion `0 && "Immediate size not set!"'
I *think* this is right, but Evan, please verify. It also looks like
CMPSDrr and maybe others are missing this info. Evan, plz investigate.
Modified:
llvm/trunk/lib/Target/X86/X86InstrFormats.td
llvm/trunk/lib/Target/X86/X86InstrSSE.td
Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=45074&r1=45073&r2=45074&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Sun Dec 16 14:12:41 2007
@@ -145,6 +145,8 @@
class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
: I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>;
+class SSIi8<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
+ : Ii8<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>;
class PSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag>
pattern>
: I<o, F, outs, ins, asm, pattern>, TB, Requires<[HasSSE1]>;
class PSIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=45074&r1=45073&r2=45074&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Sun Dec 16 14:12:41 2007
@@ -385,10 +385,10 @@
// Comparison instructions
let isTwoAddress = 1 in {
- def CMPSSrr : SSI<0xC2, MRMSrcReg,
+ def CMPSSrr : SSIi8<0xC2, MRMSrcReg,
(outs FR32:$dst), (ins FR32:$src1, FR32:$src, SSECC:$cc),
"cmp${cc}ss\t{$src, $dst|$dst, $src}", []>;
- def CMPSSrm : SSI<0xC2, MRMSrcMem,
+ def CMPSSrm : SSIi8<0xC2, MRMSrcMem,
(outs FR32:$dst), (ins FR32:$src1, f32mem:$src, SSECC:$cc),
"cmp${cc}ss\t{$src, $dst|$dst, $src}", []>;
}
@@ -405,12 +405,12 @@
// Aliases to match intrinsics which expect XMM operand(s).
let isTwoAddress = 1 in {
- def Int_CMPSSrr : SSI<0xC2, MRMSrcReg,
+ def Int_CMPSSrr : SSIi8<0xC2, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, VR128:$src,
SSECC:$cc),
"cmp${cc}ss\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1,
VR128:$src, imm:$cc))]>;
- def Int_CMPSSrm : SSI<0xC2, MRMSrcMem,
+ def Int_CMPSSrm : SSIi8<0xC2, MRMSrcMem,
(outs VR128:$dst), (ins VR128:$src1, f32mem:$src,
SSECC:$cc),
"cmp${cc}ss\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse_cmp_ss VR128:$src1,
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