Author: evancheng Date: Tue Dec 11 17:36:57 2007 New Revision: 44894 URL: http://llvm.org/viewvc/llvm-project?rev=44894&view=rev Log: If deleting a reload instruction due to reuse (value is available in register R and reload is targeting R), make sure to invalidate the kill information of the last kill.
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=44894&r1=44893&r2=44894&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original) +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Dec 11 17:36:57 2007 @@ -474,6 +474,17 @@ } } +/// InvalidateKill - A MI that defines the specified register is being deleted, +/// invalidate the register kill information. +static void InvalidateKill(unsigned Reg, BitVector &RegKills, + std::vector<MachineOperand*> &KillOps) { + if (RegKills[Reg]) { + KillOps[Reg]->unsetIsKill(); + KillOps[Reg] = NULL; + RegKills.reset(Reg); + } +} + /// InvalidateRegDef - If the def operand of the specified def MI is now dead /// (since it's spill instruction is removed), mark it isDead. Also checks if /// the def MI has other definition operands that are not dead. Returns it by @@ -537,12 +548,13 @@ // That can't be right. Register is killed but not re-defined and it's // being reused. Let's fix that. KillOps[Reg]->unsetIsKill(); + KillOps[Reg] = NULL; + RegKills.reset(Reg); if (i < TID->numOperands && TID->getOperandConstraint(i, TOI::TIED_TO) == -1) // Unless it's a two-address operand, this is the new kill. MO.setIsKill(); } - if (MO.isKill()) { RegKills.set(Reg); KillOps[Reg] = &MO; @@ -1261,8 +1273,11 @@ NextMII = &MI; --NextMII; // backtrack to the copy. BackTracked = true; - } else + } else { DOUT << "Removing now-noop copy: " << MI; + // Unset last kill since it's being reused. + InvalidateKill(InReg, RegKills, KillOps); + } VRM.RemoveMachineInstrFromMaps(&MI); MBB.erase(&MI); @@ -1298,6 +1313,7 @@ // the value and there isn't an earlier def that has already clobbered the // physreg. if (PhysReg && + !TII->isStoreToStackSlot(&MI, SS) && // Not profitable! DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 && MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) { MBB.insert(MII, NewMIs[0]); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits