Author: evancheng Date: Thu Dec 6 16:14:22 2007 New Revision: 44669 URL: http://llvm.org/viewvc/llvm-project?rev=44669&view=rev Log: Remove a bogus optimization. It's not possible to do a move to low element to a <8 x i16> or <16 x i8> vector.
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86InstrSSE.td Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=44669&r1=44668&r2=44669&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 6 16:14:22 2007 @@ -2462,7 +2462,7 @@ /// specifies a shuffle of elements that is suitable for input to MOVSS, /// MOVSD, and MOVD, i.e. setting the lowest element. static bool isMOVLMask(const SDOperand *Elts, unsigned NumElts) { - if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16) + if (NumElts != 2 && NumElts != 4) return false; if (!isUndefOrEqual(Elts[0], NumElts)) Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=44669&r1=44668&r2=44669&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Dec 6 16:14:22 2007 @@ -2734,12 +2734,6 @@ // Move scalar to XMM zero-extended // movd to XMM register zero-extends let AddedComplexity = 15 in { -def : Pat<(v8i16 (vector_shuffle immAllZerosV_bc, - (v8i16 (X86s2vec GR32:$src)), MOVL_shuffle_mask)), - (MOVZDI2PDIrr GR32:$src)>, Requires<[HasSSE2]>; -def : Pat<(v16i8 (vector_shuffle immAllZerosV_bc, - (v16i8 (X86s2vec GR32:$src)), MOVL_shuffle_mask)), - (MOVZDI2PDIrr GR32:$src)>, Requires<[HasSSE2]>; // Zeroing a VR128 then do a MOVS{S|D} to the lower bits. def : Pat<(v2f64 (vector_shuffle immAllZerosV_bc, (v2f64 (scalar_to_vector FR64:$src)), MOVL_shuffle_mask)), _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits